How to recover from NACK on I2C transaction on STM32WB55

[Thibaut M.]

My STM32WB55 is configured as I2C master and connected to an I2C slave.

My I2C block is configured like this:

I2C->CR1 = 0x01

I2C->CR2 = 0x000A0060 (slave address=0x60 and NBYTES=0x0A)

To start the I2C transaction I2C->CR2.START is set to 1.

I2C communication starts, but at some point the slave send a NACK, this is expected.

 

Then, my I2C block is stuck, I acknowledge the I2C_ICR_NACKCF flag, then send another START command. I2C block send START command on the bus but never rise the `I2C->ISR.TXIS` flag, it will never send anymore byte on the bus.

An unexpected STOP is send right after the START.

Here I can see a START command is sent on the bus and acked by the slave:

How to recover from a NACK?

Datasheet shows a diagram, if a NACK is received, state is `End` but what does it mean?

stm32wb55rg_reference_manual.pdf, section 32.4.9 I2C master mode

My only workaround for now is to reset the I2C block. I attached the capture made with a Saleae device.

Despite this NACK problem, it works well.

[Remy ISSALYS · Accepted solution]

Hello,

According to the reference manual RM0434, when a NACK is received, a STOP condition is automatically sent after the NACK reception, see the following extract:

If a NACK is received: the TXIS flag is not set, and a STOP condition is automatically sent after the NACK reception. the NACKF flag is set in the I2C_ISR register, and an interrupt is generated if the NACKIE bit is set.

After the STOP, normally you don't need to restart I2C, just send another frame.

Best Regards