2025-02-11 08:33 AM
MCU: STM32U575VG
TFT with embedded RAM: 16bpp, 8-bit 8080 interface
I'm following this scheme in which the bramebuffer is transfered via DMA2D, as decribed in AN4943:
As a comment, there is a limitation when transfering a rectangle with an odd number of pixels in width and the byte swap feature is enabled (SB bit in DMA2D_OPFCCR register). A configuration error is raised:
PL (Pixels per Line) bits, being two bytes per pixel in my case, are swappable so I didn't expect an error.
Anyway, the question is: how are we supposed to synchronize the framebuffer access between steps 1 and 2 in the drawing?
Following the documentation my guess is that calling OSWrappers::takeFrameBufferSemaphore() before sending and, as the DMA2D interrupt is handled by the touchgfx engine, the semaphore must be released in the transfer complete interrupt. Is this correct? It works but I'd like to know for sure.
Thanks,
Àlex