2022-05-11 07:49 AM
2022-05-11 08:40 AM
When DMA2D operations are active, or all the time?
Is the frame buffer in SDRAM, how wide is that bus, it being clock optimally/maximally?
Whats the colour depth of the display and the pixel clock?
Is the STM32F429 being clocked at 180 MHz ?
2022-05-11 01:58 PM
Thanks for the answer. The frame buffer is in external SDRAM at 166mhz, connected to the FMC along with the NOR flash. The bus width and color depth are 16 bits. Pixel clock is 25MHz with 55hz display. The stm32f429 is at 180mhz and the DMA2D on the touchGFX was tested with the software example, but in my code I'm having the same problem. In my code DMA2D is only used when there is data update for the frame buffer. When I disable the DMA2D it goes back to normal, but with lower performance.
2022-05-11 02:12 PM
>>SDRAM 166 MHz
No, what are you clocking it at, not what the parts rated for. So perhaps 90 MHz or less
DMA2D src/dest the SDRAM too? Display tears? Does this change with a 50 or 30 Hz refresh?
2022-05-12 05:03 AM
Yes, the sdram model informs this value, but in the project it is around 90Mhz (180/2). In the second question, I tried to lower the pixel clock to 16Mhz and the problem is gone and in touchGFX too. Now is it possible to solve the problem without lowering the pixel clock? Why is it happens? is there limitation between the LTDC and the DMA2D?