2010-10-04 11:36 AM
When I use DMA registers at the address whithin the alias region the 'Hard Fault' event is occured
2011-05-17 05:10 AM
What is the value at 0x0800160C? When it faults, what is the value in R6, does R6 + 0x194 = 0x42400600 ?
Does *((FlagStatus*) 0x42400600) = 0; work ? It should do a bit-band RMW at peripheral address 0x40020030 (DMA1, DMA_CCR3 &= ~EN)2011-05-17 05:10 AM
That code should not even compile as you are using the macro incorrectly.
Also, you cannot 'assign' to the macro.2011-05-17 05:10 AM
This macro works! For example, for GPIO:
typedef enum {Low = 0, High = 1} Pin;#define PE13out (Pin)(*((Pin*) 0x422301B4)) //GPIOE13 register ODR /*****************************************************************************************/ PE13out = High;2011-05-17 05:10 AM
R6=0x4240 046C. Ie R6 = 0x42400600 - 0x194. Address is correct.
2011-05-17 05:10 AM
Very odd, don't see an errata.
It appears to be working on VL part (STM32F100RBT68) 4833 ldr r0,[pc,#212] ; @0x08001088 [0x42400600] F8805000 strb r5,[r0, #0] ; r5 = 0 This is without the clock enabled to DMA1. The next thing to check might be to look at the address the DMA controller might be set up to access, and if perhaps the DMA controller is glitching, or otherwise doing a read/write that is causing a fault somehow. Other than that I'd have to try some different chips, but the fact it is faulting for you is not a good sign as the code/setting you are using are otherwise correct.2011-05-17 05:10 AM
I found a partial solution. If you declare M25P_DMA_SPITXE as 32bit:
# Define M25P_DMA_SPITXE (u32 )(*(( u32 *) 0x42400600)) Then after compiling the STR instruction is used: 0x0800154E 4E32 LDR r6, [pc, # 200]; @ 0x08001618 0x08001550 6035 STR r5, [r6, # 0x00] Thus, there is no error.2011-05-17 05:10 AM
2011-05-17 05:10 AM
You might want to check what the size of the Yes/No enum is. Or check how your compiler packs enums.