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What is the relation between ADON(ADC_CR2) and SWSTART with Sample and Hold schematic. STM32F415 device.

MTsen.1
Associate

I have to replace HAL(ADC) with self made implementation (regular channel, 1 channel, single conversion).

During that, i found that delay between setting of ADON and SWSTART (Tstab) is significant for the quality of the measurement (stm32f4xx_hal_adc.c, line 738).

Typically it have to be 2 uS but if i increase it to XmS, the measured value is always 0.

What i suspect is that turning on of ADON and later SWSTART is related to SH switch in front of ADC, that's why i got wrong values when this time is increased significantly.

Is this is true or there is another explanation for issue above?

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