2017-04-15 04:55 AM
Hi,
As the title I want to implement Muxed NOR on STM32F207ZG Nucleo board
following is SRAM read write code.
for (uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++) { *(__IO uint16_t*) (SRAM_BANK_ADDR + WRITE_READ_ADDR + 2*uwIndex) = aTxBuffer[uwIndex]; } /* Read back data from the SRAM memory */ for (uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++) { aRxBuffer[uwIndex] = *(__IO uint16_t*) (SRAM_BANK_ADDR + WRITE_READ_ADDR + 2*uwIndex); }so for muxed NOR how we will be defining the address and data as it has common address and data lines?
where the control signals are being set?
2017-04-15 08:43 AM
That would be a function of the FSMC, you'd need to configure that correctly, and then as you access addresses within the ARM address space these are translated to the signal/sequences on the external bus.
As I recall there are 4x 64MB regions within the 0x60000000..0x6FFFFFFF address space that fall under the control of the FSMC