Using an external signal to clear TIM counter

[jsvirzi]

Posted on May 11, 2018 at 20:57

I'm using TIM2 as a PWM. I have an (periodic) external signal that should reset the TIM2 counter to zero, so that the PWM is synchronized to the external signal. In a previous naive setup, I used the external signal to generate an interrupt (EXTI), and reset the counter in software (TIM2->CNT = 0). There is too much latency (and lack of determinism) in this approach so I would like to use the input signal to perform a hardware timer clear.

I suspect I want to use TIM2 with trigger source TI1_ED. Then bring the external signal into TIM2 CHAN1. Then I can use TIM2 CHAN2 as PWM output.

Can someone indicate if this is the right approach, or should I think about it in a different way? I can prototype it on a STM32F4 discovery board.

Thanks

#tim-counter

[waclawek.jan]

Posted on May 11, 2018 at 21:24

Sounds good, although note that TI1F_ED detects both edges, so that's maybe not exactly what you want.

JW

[henry.dick]

Posted on May 11, 2018 at 22:16

look up external trigger synchronization in the datasheet.

[jsvirzi]

Posted on May 11, 2018 at 21:40

Oh! Can I use it in a single-edge mode? If not, should I try a different approach? Do ITRn have an external interface? This is what is confusing me. Thanks!

[jsvirzi]

Posted on May 11, 2018 at 22:48

I have indeed looked at much of the documentation, for example the cookbook 

http://www.st.com/content/ccc/resource/technical/document/application_note/group0/91/01/84/3f/7c/67/41/3f/DM00236305/files/DM00236305.pdf/jcr:content/translations/en.DM00236305.pdf

      

I also have looked at the following presentation of timers/counters for the STM32 family 

http://mazsola.iit.uni-miskolc.hu/DATA/storages/files/_kbFGJG__bqURUT.pdf

     

As well as the datasheet, yes, the super long one 

http://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf

   

I've used these timers many times before, but never understood how to use an external (off-chip) signal to clear the counter register. The examples in the above referenced documentation use other timers, etc. or have different use cases.

So, please bear with my ignorance, and point me to the relevant part of the datasheet. Thanks in advance!

[waclawek.jan]

Posted on May 12, 2018 at 00:10

Oh! Can I use it in a single-edge mode?

Yes - TI1FP1 (and TI2FP2 for CH2) - both are tapped off after an edge detector, see Figure 'Capture/compare channel (example: channel 1 input stage)' in reference manual.

I've concocted a simple example -

http://www.efton.sk/STM32/ext_reset.zip

  - it's for the 'L4 DISCO, but shouldn't be too hard to modify it for the 'F4 DISCO, or just read it for inspiration.

JW

[jsvirzi]

Posted on May 12, 2018 at 02:30

Thanks! And especially thanks for making it 'small and readable'. I will close the loop (post results) after I test this, so that other people can benefit from this.

[henry.dick]

Posted on May 12, 2018 at 17:25

'

So, please bear with my ignorance, and point me to the relevant part of the datasheet.

 '

I suppose 17.3.19 is the right section for that?