2013-07-25 06:06 AM
2013-07-25 07:30 AM
I know we've told you a couple of times this is NOT how to clear interrupts.
TIM4->SR &= ~TIM_SR_CC1IF; //Clear Timer3 CC1 Interrupt Flag2013-07-25 02:07 PM
2013-07-25 02:22 PM
You know your testing for CC2 and clearing CC1 right? I'd try and follow the code but some of the comments don't match the timer being referenced. Can you advance CCR2 rather than clearing CNT? Setting CCR2 = CNT is apt to generate an interrupt, when the comparison fires.
if (TIM4->SR & TIM_SR_CC2IF) { GPIOB->BRR = (1 << 9); TIM4->SR &= ~TIM_SR_CC1IF; //Clear Timer3 CC1 Interrupt Flag FilterCommuationTime = TIM4->CNT; TIM4->CNT = 0; //Reset Timer4 Counter The EOC can be cleared by reading the ADCx->DR. You should perhaps read the ADC1->DR just once as a 32-bit, then split into upper and lower 16-bit components.2013-07-25 03:36 PM