Posted on August 04, 2016 at 17:07Timer3 runs 2x faster than expected
I know what many readers are thinking but read on
I set my STM32F746 (DISCOVERY PCB) for SysClk=216 MHz
AHB Prescaler set to �1 thus HCLK = 216 MHz
APB1 prescaler set to �4 thus PCLK1 = 54 MHz & APB1 timer clocks are 108 MHz
APB2 prescaler set to �2 thus PCLK2 = 108 MHz & APB2 timer clocks are 216 MHz
(RCC_CFGR: PPRE2=4 and PPRE1=5 -- I checked)
Timer3 is on APB1 thus its input clocking is 108 MHz
Unless my understanding is bad, its CK_PSC is also 108 MHz
Then setting TIM3_PSC to 1 (�2) CK_CNT = 54 MHz
Then setting the auto reload register (TIM3_ARR) to 54000 should set the UIF bit in TIM2_SR at 1 KHz.
I use Timer3 / ISR to make a 1 kHz up-counter in RAM.
But the damn thing up-counts at 2 kHz. Setting TIM3_PSC to 3 (�4) gives me my desired interrupt rate. Thus I have a workaround.
As a sanity check I used the ARM 24-bit timer running at HCLK (no �8) with 0xFFFFFF reload also performing a RAM increment. I did this running a while(1) which, because I prefer assembly, was written as �b .�
In 60 seconds (eyeball on a sweep second hand) I got 744 ARM timer counts while I got 120338 �millisecond� interrupts. The count of 744 ARM timer interrupts is well within error limits for pressing pause on the debugger. FWIW, caching is disabled by reset and any existing cache has been scrubbed.
Clearly I misunderstood something. But what?
#!timer #stm32f746-discovery
