2012-07-11 06:46 AM
Hi,
I would like to know why in TIM_OCMode_PWM1, I can calculate the frequency 'Duty cicle' TIM_CLK / (TIM_Period + 1) 36MHz/(999+1) Frequencia = -------------------------------- Logo, ------------------ = 18KHz (TIM_Prescaler + 1) (1+1) (see attached file) And in TIM_OCMode_Timing the period was set with 65535???? 'OCActive' (see attached file) #stm32-duty-cicle-ocactive-pulse2012-07-12 11:32 AM
Because presumably using the maximal 16-bit counter value makes advancing the CCR at each CC interrupt profoundly easier to do, and doesn't require any modulo math using slow divide instructions. And issues with CC/Update interrupts.
By advancing the CCR you can generate a far wider range of frequencies than you can with the integer divider methods.2012-07-13 11:04 AM
THANKS clive1