Posted on January 26, 2015 at 14:26Dear all,
I face a strange behaviour of a timer. I appreciate any comments and suggestions.
The timer is configured in one pulse mode and with slave mode 'trigger' from channel 1.
With a rising edge the timer is triggered. The falling edge of the input signal captures the counter value on channel 1 and triggers an interrupt.
Within this interrupt the timer is disabled by resetting the CEN bit of CR1.
However, the timer keeps running until the preset timer value in ARR is elapsed and triggers an update event/interrupt.
I thought, that the timer should stop counting when the CEN bit is reset, even in OPM mode. Does anybody know, how can I achieve this?
Thanks in advance.
#timer
