TIM5_CH1_ETR

[torleiv]

Posted on January 23, 2012 at 11:02

I need all four channels on TIM5 for input capture. According to the data sheet, TIM5_CH1 is available on PA0. On PH10, a signal called TIM5_CH1_ETR is available. Can I use this pin as a normal channel 1 input, or does it work differently?

[Tesla DeLorean]

Posted on January 23, 2012 at 17:07

I need all four channels on TIM5 for input capture. According to the data sheet, TIM5_CH1 is available on PA0. On PH10, a signal called TIM5_CH1_ETR is available. Can I use this pin as a normal channel 1 input, or does it work differently?

Some how I don't think it works like that, but you could stare at the block diagrams for the TIM units yourself, and see if it routes. What part, specifically, are you using, it's hard to infer from your question.

[torleiv]

Posted on January 24, 2012 at 08:35

What part, specifically, are you using, it's hard to infer from your question.

I am going to use all four input capture channels to measure the frequencies of four external signals. Some how I don't think it works like that, but you could stare at the block diagrams for the TIM units yourself, and see if it routes. Actually, I am not able to find a good block diagram for TIM2 to TIM5. TIM1 & TIM8 has a better one, but I am not able to find an answer to my question. Let me try to explain a little bit more: Most capture/compare signals are named TIMx_CHn. Some timers have signals named TIMx_ETR (TIM1, TIM3, TIM4 and TIM8) while TIM2 and TIM5 have signals named TIM2_CH1_ETR and TIM5_CH1_ETR. As far as I can see, these are not described in the reference manual. Does this mean that these pins can be used either as ETR or as CH1, or something completely different?

[Tesla DeLorean]

Posted on January 24, 2012 at 19:12

Which part are you using?

For the STM32F1 series TIM2 through TIM5 share a common form. It is diagrammed in ''Figure 100 General Purpose timer block diagram'' Page 337 of RM0008 (Doc ID 13902 Rev 11) The nomenclature TIM5_CH1_ETR means the pins TIM5_CH1 and TIM5_ETR are wired together internally. ETR is always an input so does not conflict. You get to choose if CH1 is an input or an output, and you get to choose if the ETR pin is used as a trigger, or external clock input, based on the diagrammed muxing.

[torleiv]

Posted on January 25, 2012 at 09:15

Which part are you using?

Oh, sorry. I got your question wrong. I'm using a STM32F4 (07 on the discovery board at the moment). For the STM32F1 series TIM2 through TIM5 share a common form. Same for STM32F4. It is diagrammed in ''Figure 100 General Purpose timer block diagram'' Page 337 of RM0008 (Doc ID 13902 Rev 11) This diagram can ge found in the reference manual for STM32F4 too. However, I can only find it for the advanced control timers TIM1/TIM8, not for TIM2-TIM5. The nomenclature TIM5_CH1_ETR means the pins TIM5_CH1 and TIM5_ETR are wired together internally. ETR is always an input so does not conflict. You get to choose if CH1 is an input or an output, and you get to choose if the ETR pin is used as a trigger, or external clock input, based on the diagrammed muxing. That is exactly what I needed to confirm, since I wasn't sure about the nomenlature. I don't need the ETR pin. I simply need to be able to use CH1 for as an input capture channel. From what you are saying, this seems to be no problem. Thank you very much for your help!