Associate III

Question

TIM2 is not generating any interrupts on STM32f051

Forum|Forum|13 years ago
December 4, 2012
23 replies
3677 views

Posted on December 04, 2012 at 15:56

Dear all,

I've an issue with TIM2 on the STM32f051

I did a port from STM32f103, however the interrupt is not activated anymore.

A big difference is that I use a f0discovery board, so I make use of an internal RC occilator.

I did some changes to use the HSI for clocking the PLL at the correct frequency

Since TIM14 is working, it looks like initialising the clock is working fine.

This is how the clock is initialized:

static void Clk_Init(void)

{

RCC_HSICmd(ENABLE);

while (RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == RESET);

RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);

/* Init PLL (8MHZ/2)*12 = 48MHZ */

RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_12);

RCC_PLLCmd(ENABLE);

while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);

RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

FLASH_PrefetchBufferCmd(ENABLE);

FLASH_SetLatency(FLASH_Latency_1);

/* TIM2,3,14 at 48MHz */

RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM2 |

RCC_APB1Periph_TIM3 |

RCC_APB1Periph_TIM14 | RCC_APB1Periph_USART2, ENABLE);

}

This is how the initalisation of the timer is done

void init_timer(void)

{

/* Peripherals InitStructure define */

static TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;

static NVIC_InitTypeDef NVIC_InitStructure;

TIM_TimeBaseStructure.TIM_Period = 48;

TIM_TimeBaseStructure.TIM_Prescaler = 0;

TIM_TimeBaseStructure.TIM_ClockDivision = 0;

TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;

TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); /* set up Timer 2 */

NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;

NVIC_InitStructure.NVIC_IRQChannelPriority = 2;

NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

NVIC_Init(&NVIC_InitStructure); /* Prescaler configuration */

TIM_PrescalerConfig(TIM2, (NR_MSEC_FOR_MAIN * MSEC), TIM_PSCReloadMode_Immediate);

TIM_InternalClockConfig(TIM2);

TIM_Cmd(TIM2, ENABLE); /* switch timer on */

}

After this initialisation, the micro never enters the TIM2_IRQHandler()

Does someone has any idea? did I forgot any initalisation?

TIM14 is working fine, however it does not make use of an IRQHandler().

Regards,

Evert Huijben

#irq-tim2-discoveryf0

TIM

This topic has been closed for replies.

Tesla DeLorean

Guru

Posted on December 04, 2012 at 16:58

Wouldn't you need to use TIM_ITConfig(TIM2, TIM_IT_Update); to actually enable the interrupt you want?

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evert2Author

Associate III

Posted on December 04, 2012 at 17:08

Hi,

Enabling the TIM_IT_Update is not helping me,

I assume that by default all timer interrups are enabled.

However, thank you for the suggestion

Has anyone idea's how to resolve this issue?

Regards,

Evert Huijben

Tesla DeLorean

Guru

Posted on December 04, 2012 at 18:15

/* TIM2 1 Hz Toggle STM32F0-Discovery sourcer32@gmail.com */
#include ''stm32f0xx.h''
#include ''stm32f0_discovery.h''
void TIM2_IRQHandler(void)
{
if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET)
{
TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
/* LED3 toggling */
STM_EVAL_LEDToggle(LED3);
}
}
int main(void)
{
NVIC_InitTypeDef NVIC_InitStructure;
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
/* TIM2 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
/* Enable the TIM2 gloabal Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Initialize LED3 mounted on STM32F0-Discovery */
STM_EVAL_LEDInit(LED3);
/* Turn on LED3 */
STM_EVAL_LEDOn(LED3);
/* Time base configuration */
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t) (SystemCoreClock / 1000) - 1; // To KHz
TIM_TimeBaseStructure.TIM_Period = 1000 - 1; // To Hz
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
/* TIM Interrupts enable */
TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
/* TIM2 enable counter */
TIM_Cmd(TIM2, ENABLE);
/* Infinite loop */
while (1);
}

Seemed to work for me, no idea what your problem is. Suggest you review examples in the firmware library and get comfortable with them. The CMSIS startup code configures the processor/bus speeds, I'd change the code in SystemInit() system_stm32f0xx.c to be using the HSI.

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evert2Author

Associate III

Posted on December 05, 2012 at 10:20

Hi,

Thank you for the example,

However also this example is not working.

I also discovered that USART interrupts are not working too.

So it seems that interrupts in general are not working.

Since my application is making use of IAP programming, I have my doubts about my IAP part of my bootloader and application. For implementation I have followed the ST guidelines described in AN4065 and used the given example as basis.

However since USART interrupts are used in the bootloader, I do a __disable_irq() before dumping to my application.

Can this give issues in my application? when I omit the disable_irq function I immediatly got interrupts after initialising them.

Do anyone has idea's what de problem might be?

Regards,

Evert Huijben

evert2Author

Associate III

Posted on December 05, 2012 at 10:29

Hi,

I've read somewhere that if the vector table cannot be found, that this can cause issues with the interrupts? Can this be a possible cause of the problems?

Evert Huijben

Tesla DeLorean

Guru

Posted on December 05, 2012 at 16:36

I've read somewhere that if the vector table cannot be found, that this can cause issues with the interrupts? Can this be a possible cause of the problems?

Clearly if the processor is looking at a different vector table, which doesn't include your function address(es), it's not going to reach the destination you expect. You'll need to become more familiar with the architecture.

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frankmeyer9

Associate III

Posted on December 05, 2012 at 16:53

I believe it would cause some more trouble if the vector table wasn't correct, already at startup.

You might need to check that the name of your interrupt handler routine matches that of the header/startup file for your controller and toolchain.

That is especially true for your port between from F1 to F0. Some names have changed, and some peripherals share a vector, which is also reflected in the (new) name.

Tesla DeLorean

Guru

Posted on December 05, 2012 at 19:10

One of the issues with the M0 is that you can't relocate the vector table. On M3/M4 parts you could use VTOR. The STM32F0 allows you to remap the memory behind address zero, and so for an IAP bootloader to work you'd need to map RAM behind it and copy in the new table from the application, which presumably isn't situated at 0x08000000 in FLASH anymore.

See MEM_MODE in SYSCFG_CFGR1

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evert2Author

Associate III

Posted on December 06, 2012 at 10:16

Hi Clive and Fm

Thank you for the suggestions,

I will given an overview of my software setup, maybe you get an idea what might be wrong.

I have used the IAP example of ST including the included linker files (TASKING) for both bootloader and application. I did some small changes because the application adress has changed. I develop my application in eclipse and build it with a GNU compiler. This works fine in the bootloader, even for USART interrupt I am using in this bootloader.

For the startup files, I use the ones provided by ST templates, both for the bootloader and for the application. The USART and TIM interrupt handlers are defined by default, so I expect that this should be no problem. As said, this is working for the usart in the bootloader.

However, I used the template /Source/Template/TrueSTUDIO/startup_stm32f0xx.s.

Is this the correct file for usage with a GNU compiler? or should the ARM or GCC_ride version be used?

Can you help me out of this issue?

Regards, Evert Huijben

frankmeyer9

Associate III

Posted on December 06, 2012 at 11:57

I have used the IAP example of ...

IAP is tricky, I haven't yet done much with it.

The USART and TIM interrupt handlers are defined by default, so I expect that this should be no problem.

I think my idea from yesterday doesn't match your problem. The TIM2 interrupt share the same name. I had been porting an application from a F10x to a F05x, while stumbling over this issue. The ADC interrupts have different names, and the F0 ADC shares his interrupt with the comparator.

But there is another thing you can check. As the F0x-variants have different peripherals, I'm not sure if all use the same vector map. I'm using Crossworks (also GCC--based), which includes a ''stm32fxxx.vec'' file in the startup code (for F10x). That include relies on having the proper variant definition in the project properties. I have not yet checked this for F0 devices.

But I would check for proper placement of the TIM2 interrupt routine both in the map file and finally on the device, using the debugger.

However, I used the template /Source/Template/TrueSTUDIO/startup_stm32f0xx.s.

Is this the correct file for usage with a GNU compiler? or should the ARM or GCC_ride version be used?

This should be ok.

The Atollic and RIDE startups are very similar, and the vector table section is identical.

Both toolchains are based on GCC, and use the same assembler syntax. Keil does not.

And, by the way, the Cortex M0 does not have a vector table offset register, it's vtable is fixed.

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