TIM12 clocked by TI1 with reset+trigger by TI2?

[David Littell]

Greetings all,

Is there a way to configure TIM12 to be clocked by TI1FP1 and reset (with trigger to continue counting) via TI2FP2? Or is this going to require some hideous multi-timer contraption?

Thanks,

Dave

[Petr DAVID · Accepted solution]

Hello David Littel,

unfortunately this configuration would not be possible. You can choose external clock mode 1 and clock the timer with signal connected connected to TI1 or TI2 pins, but then you cannot use other slave modes as trigger or gated mode. You can combine different slave modes with external clock input in timer that have ETR input and are capable of external clock mode 2. Please see chapter 2.4 of AN4776. Maybe it would be option for you to use EXTI on the specific pin and program interrupt routine that would reset the timer.

Please click on Select as Best if my reply fully answered your question. This will help other users with the same problem to find the solution faster!

[David Littell]

Hi Petr,

Thanks very much for the quick reply! In the end I did decide to use an interrupt hander to reset the timer. Hopefully I can figure something out with a different timer as you described before the hardware design is finalized.

Thanks again,

Dave

[David Littell]

As a followup, there appears to be no way to do what I need in this case (with any timer): an externally clocked timer with an external reset signal. Note that my concept of "reset" implies "start over and keep counting", which equates to ST's "reset+trigger" option. No timer I checked allowed "reset+trigger" with External Clock Mode 2. They do "reset" and "trigger" but not "reset+trigger" in ECM2.

Seems like that would have been a trivial additional capability for the timer designers to include. Oh, well.

[waclawek.jan]

Always start with stating, which STM32 are you using.

> my concept of "reset" implies "start over and keep counting", which equates to ST's "reset+trigger" option

No, that's plain "reset" (which is equivalent to "reset counter and create update event").

"reset + trigger" means "reset counter, create update event, and set TIMx_CR1.CEN i.e. start counter if it was not already running"

> No timer I checked allowed "reset+trigger" with External Clock Mode 2. They do "reset" and "trigger" but not "reset+trigger" in ECM2.

I don't know how did you check, but don't see why clocking from ETR would in any way prevent the slave-mode controller from performing reset+trigger in those timers where reset+trigger is available at all.

JW

[David Littell]

Hi Jan,

Thanks for the reply. I'm working with an STM32H7B3. Petr's initial recommendation to use External Clock Mode 2 in conjunction with a slave mode seemed like it would but no timer in the device allows ECM2 with the "reset+trigger" slave mode. They only support reset, gated, and trigger modes according to the TIMx_SMCR.ECE bit description in the Reference Manual (RM0455). ECM2 is only supported on TIM[1, 2-5, 8].

Thanks,

Dave

[waclawek.jan]

Dave,

> They only support reset, gated, and trigger modes according to the TIMx_SMCR.ECE bit description in the Reference Manual (RM0455).

OK I see. I would be surprised if this would not be simply a leftover from the older timers' description, where simply there were no more slave modes.

@Petr DAVID​ , can ST please have a look at this particular line in RM, and if it needs to be corrected, make sure it's corrected in every related i.e. newer STM32's RM?

Thanks,

JW

[Petr DAVID]

Hello David Littel,

I will raise this question internally. I could confirm I have found the note in the ECE bit definition, but it seem to me weird that the mode reset+trigger could not be used. I will get back to you as soon as I will have some answers.

[David Littell]

Hi Petr,

Thanks very much!

[David Littell]

Crickets?