2009-06-19 05:25 PM
TIM Internal Connection
2011-05-17 04:15 AM
Hi fellow developers:
Does anybody know how to internally connect timers using the ITR0 through ITR3 mechanism? I found a library function, TIM_ITRxExternalClockConfig() which allows me to choose which ITR0 through ITR3 to use as ''input'' for the given timer, but nowhere can I find the source which is connected to ITR0 through ITR3 (i.e. from where do IT0 through IT3 originate?). Perhaps one of you, or our moderator, knows the answer. As usual, any suggestions would be most appreciated. Thanks, Garry.2011-05-17 04:15 AM
Hi Guys:
I figured it out. ST has a naming convention inconsistency. The clue can be found in the Reference Manual for the TS bits in the TIMx_SMCR register (chapter 13.4.3): INT0 = TIM1 (presume TRGO signal) INT1 = TIM2 (presume TRGO signal) INT2 = TIM3 (presume TRGO signal) INT3 = TIM4 (presume TRGO signal) It would have been smarter for ST to name the Internal Trigger Signals as INT1 through INT4 instead of 0 through 3. Must have been different development teams working on different parts of the chip. Of course, it is not too late for ST to correct the documentation and diagrams and re-name the ITR signals to be consistent with their source. Garry. [ This message was edited by: design6 on 18-06-2009 02:15 ]2011-05-17 04:15 AM
Hi design6,
Unfortunately that section of the reference manual is misleading or just not correct. If you look lower on that page (p308, table 59) there's a listing of exactly which ITR input lines correspond to which TRGO output lines. It actually depends on which timer is being used. This threw me off for a while because like you also I thought ITRx was always linked to TIM(x + 1). I got lucky for TIM4 linked to TIM2 but was missing it for TIM5 linked to TIM4. Hopefully this can help you/others avoid the a similar pitfull.2011-05-17 04:15 AM
Hi Kutnickg:
Thank you very much for that wonderful find. Garry.