Synchronize TIMx, SPI1 and SPI2

[TDK]

Posted on February 13, 2016 at 02:40

I'd like to set up TIM1_CH1, TIM2_CH1, and TIM3_CH1 to be synchronous in the sense that the counters reset to 0 on the same clock tick.  It seems like this is possible using ''HAL_TIMEx_MasterConfigSynchronization''.

I'd also like to set up the output of SPI1 and SPI2 such that its output is bit-synchronous with these timers.  That is, the first bit begins to be sent as the timers reset to 0.  The output of SPI1 and SPI2 is continuous (driven by circular DMA).  Is there anyway to do this?Right now, I can sort of synchronize SPI1 to TIM1 by manually setting ''TIMx->CR = X'' sometime after the SPI transfer begins.  However, I can't get it to be the exact clock edge, and this method is likely to be compiler-dependent anyway.  I don't see a way to synchronize SPI1 and SPI2.Any guidance would be helpful.  Is there possibly some way to have the HCLK go to sleep while I set things up, then enable it later on to have all peripherals wake up at the same time?Thanks,Tim

[mark239955_stm1]

Posted on February 13, 2016 at 09:21

(Leaving aside any mention of the HAL, because I don’t use it, and I doubt it would be flexible enough to do what I suggest, below).

You don’t reference the part that you’re using, which makes suggestions a little harder.

I’m going to assume an F4xx part because they’re very common and I’m familiar with them.

You can slave timers to a master timer, including having the slave timers be reset on a trigger output from the master timer.

Having multiple timers start simultaneously from a master is even referenced in the manual as a suggested use-case.The combinations of master and slave timers are fairly constrained, so careful planning is required.

You can cause TIM1 or TIM8 in OC mode (perhaps as the master mode timer, above) to generate DMA transactions from the DMA2 module.

The DMA2 module can access almost anywhere in the memory space, so it can be used to write to SPI module configuration registers, causing them to start operating.

Personally though, if my timing constraints were as tight as you seem to be describing, I’d use an FPGA.

[TDK]

Posted on February 13, 2016 at 18:53

STM32F429.

My current thought is to set up the SPIs in slave mode, and use a timer to generate the clock.  One more timer than I wanted, but there are plenty to go around.  If I can get the timers all synchronized, that seems pretty foolproof, I'll give it a shot in the next few days.If timers are a few edges off from one another, not the end of the world.  It would just be nice for it to be exact.