SWD multi drop support on STM32L4

[pt70]

Hi all.

I'd like to know if STM32L4S5 and STM32L432 support SWD multi drop (SW-DP v.2 protocol).

Thank you in advance.

Best regards,

P.

[TDK]

There's this post saying the STM32H7 has multi-drop support:

https://community.st.com/s/question/0D50X0000AIdZjnSQF/does-the-stm32h750-support-multidrop-swd

But it's not mentioned in any reference documents or promotional material for the H7. Unsurprisingly, the L4 documents don't contain any information either.

[Uwe Bonnes]

DP on L4 is V1. Multidrop support needs DP V2.

[TDK]

I am not doubting you, but where did you obtain this information? Can you see it when you connect with debugger or something?

[Peter BENSCH]

@TDK​ The older reference manuals did not contain this yet, but the new ones already contain the note in the section Debug Infrastructure: The SWJ-DP implements SWD protocol version 2, if it is included.

[Uwe Bonnes · Accepted solution]

You can find out by decoding the DPIDR. Here for a G474, no L4 at hand:

Read Core ID: 0x2ba01477

DPIDR 0x2ba01477 (v1 rev2)

[TDK]

@Peter BENSCH​ By "new ones", do you mean ones we don't have access to? I can't find the phase in any current reference manuals.

https://www.st.com/resource/en/reference_manual/dm00176879-stm32h745755-and-stm32h747757-advanced-armbased-32bit-mcus-stmicroelectronics.pdf

[pt70]

Thank you very much. Just for reference (from ADIv6.0:(

[Uwe Bonnes]

E.g. RM0399 decodes Debug port identification register (DP_DPIDR)

Bits 15:12 VERSION[3:0]: DP architecture version

           0x2: DPv2

[Peter BENSCH]

@TDK​ I meant newer families like e.g. STM32H7, U5.

The SWD protocol version 2 is mentioned as a note in the RMs under Serial-wire debug port, e.g. for

• the STM32H743, RM0433 r7, section 60.4.1,
• the STM32L572 in RM0438 r2, section 52.2.9
• the STM32U575 in RM0456 r2, section 65.3.2
• for your STM32H745 in RM0399 r3, section 63.4.1

Regards

/Peter