SWD Multi Drop on STM32H5 and target instance

[KiloMike]

We are looking into accessing two identical H5 via one SWD connection. 

My understanding is that:

- We would need to use third party tools instead of STLink for multi drop support

- The processors support multi drop

- But it does not work with multiple identical processors, because the target identification register (TINSTANCE in DP_DLPIDR) is hardcoded to 0, and cannot be changed. 

Is this understanding correct, and if not, what tools would you recommend for multi drop?

[STOne-32 · Accepted solution]

Dear @KiloMike ,

Your understanding is correct and since the TargetID is the same , the only way is to see the instance ID which we hardcode to 0 at silicon . So not possible to have multi drop chain on SWD with same MCU ID .

https://developer.arm.com/documentation/ddi0314/h/Debug-Access-Port/SW-DP/SW-DP-multi-drop-support

But it should be possible on legacy JTAG serial chain .

STOne-32

[KiloMike]

Thank you for your response