2012-08-31 08:25 PM
I'm running some ADC tests on a VLDiscovery board. The values returned for sampling the internal temp sensor and voltage reference seem to move around in surprising ways. Here's some data:
> ADC samples: channel 16: 2401 1732 2047 2046 2046 2048 2048 2047 2048 2046 channel 17: 1914 1931 2058 2059 2061 1803 1804 2061 1804 2061 channel 4: 2044 2046 2045 2043 2045 2041 2046 2042 2045 2044 channel 1: 978 979 978 978 979 978 980 978 978 978 channel 16: 1307 1896 1895 1896 1896 1896 1897 1897 1897 1897 channel 17: 1776 1994 1994 1994 1996 1996 1995 1995 1995 1994ADC samples: channel 16: 2402 1733 2046 2045 2045 2046 2044 2045 2046 2047 channel 17: 1916 1931 2057 2058 2059 2060 2059 2059 2060 2061 channel 4: 2045 2046 2045 2043 2045 2044 2045 2043 2020 2046 channel 1: 977 979 979 978 978 978 979 978 978 979 channel 16: 1307 1896 1895 1896 1895 1895 1896 1895 1896 1896 channel 17: 1775 1993 1994 1994 1994 1994 1995 1994 1995 1995ADC samples: channel 16: 2401 1731 2045 2044 2045 2046 2046 2046 2045 2046 channel 17: 1914 1928 2059 2057 2059 2058 2059 2060 2058 2059 channel 4: 2043 2045 2043 2041 2046 2044 2046 2044 2023 2044 channel 1: 978 979 978 978 977 978 980 978 978 978 channel 16: 1308 1895 1894 1896 1895 1895 1896 1895 1896 1895 channel 17: 1776 1992 1993 1994 1994 1994 1995 1993 1994 1993These are three successive runs of code that collects 10 samples from six input channels. Channels 16 and 17 are the internal temperature sensor and voltage reference respectively, measured once at the beginning of the run and again at the end. Channel 4 is a voltage divider at 50% of VDD and Channel 1 is set by a potentiometer.Notice that the external ADC inputs are quite stable (e.g., Channels 1 and 4). However, the internal inputs suggest that temperature and/or voltage are changing between the first sampling and the second. Every ADC sample in this code (regardless of which channel) gets 239.5 ADC clocks for sampling time.The temp/vref values aren't particularly interesting in the long run, but I'd like to understand what the ADC is doing. Is there an explanation for why the internal stuff varies so much?In case it matters, I've hacked this VLDiscovery board to use a STM32F103RG mcu instead of the original.2012-09-01 06:34 AM
The internal channels require a long time to stabilize before accurate readings are available. See the start up and sampling time data in the data sheet. For data sheet Rev 13 it is section 5.3.19.
My experience with the F4 Discovery board is that the start up time for accurate results was 6 time the data sheet number. Don't know why. Try adding a delay between enabling the Vref and Temp sensor and starting conversion. Cheers, Hal2012-09-01 05:46 PM
I think I found the problem. The board initialization was leaving ADCPRE at DIV2 which meant the ADC clock was running at 36MHz--way over the 14MHz limit. Once I set ADCPRE to DIV8, the numbers got better.
> ADC samples: channel 16: 548 1908 1910 1909 1910 1910 1910 1909 1912 1910 channel 17: 1660 1696 1695 1694 1696 1693 1695 1693 1695 1695 channel 4: 2044 2045 2044 2043 2046 2045 2046 2047 2041 2043 channel 1: 928 930 929 929 928 930 929 928 930 931 channel 16: 1910 1910 1909 1910 1911 1910 1910 1912 1910 1910 channel 17: 1693 1696 1694 1694 1693 1696 1696 1693 1695 1696 channel 4: 2044 2043 2043 2045 2045 2045 2046 2043 2042 2044 channel 1: 928 929 928 930 929 929 928 928 927 930ADC samples: channel 16: 1484 1909 1908 1908 1909 1908 1908 1908 1910 1910 channel 17: 1586 1695 1694 1693 1695 1692 1693 1693 1695 1694 channel 4: 2045 2044 2044 2043 2045 2045 2046 2045 2044 2045 channel 1: 926 930 929 929 930 927 929 929 929 930 channel 16: 1909 1908 1909 1909 1908 1908 1909 1908 1908 1911 channel 17: 1691 1696 1694 1693 1693 1693 1691 1695 1693 1693 channel 4: 2043 2043 2046 2045 2043 2045 2045 2045 2044 2045 channel 1: 928 929 930 927 926 930 927 919 930 929ADC samples: channel 16: 1484 1911 1910 1910 1911 1908 1910 1910 1911 1910 channel 17: 1588 1695 1694 1691 1692 1693 1694 1692 1694 1693 channel 4: 2044 2046 2044 2045 2045 2045 2043 2043 2044 2045 channel 1: 930 929 928 928 930 927 928 927 927 928 channel 16: 1909 1910 1910 1911 1910 1910 1911 1911 1910 1911 channel 17: 1694 1695 1692 1691 1694 1693 1693 1695 1695 1693 channel 4: 2044 2044 2045 2044 2044 2044 2044 2046 2044 2044 channel 1: 928 929 929 928 929 927 929 929 929 928This was with Vdd/Vdda = 2.989vThe channel 4 pin at 1.494v = (1.494/2.989)*4096 = 2047The channel 1 pin at 0.68v = (0.68/2.989)*4096 = 932Vrefint (channel 17) is spec'd between 1.16 and 1.24v which is 1589 to 1699 on the ADCThe internal channels use a sampling time greater than 17.1us (specified in the ref manual). The external channels use the shortest sampling time available.The only issue seems to be that the first samples from the internal channels are always low. I don't think this is related to enabling TSVREFE because that happens when the board was reset. The samples are taken when I press the user button a gazillion clock cycles later. Not a deal breaker, just odd.2013-01-24 02:26 AM
2013-01-24 06:42 AM
See RM0008, the All Densities Reference Manual, Section 11.10.
Cheers, Hal