STM32L5, octo-SPI interface connect to a quad-SPI NOR Flash memory.

[GRizz.2]

I would like to use the octo-SPI interface to connect to a quad-SPI NOR Flash memory.

What is the rationale behind the octo-SPI IO2 line being forced to 0 when single-SPI mode is selected?

Octo-SPI IO2 line is connected to nWP/IO2 pin of the typical quad-SPI NOR Flash memory pinout.

RM0438 §20.4.4 says "..IO2 is in output mode and forced to 0 (to deactivate the write protect function).."

But the write protect pin (WP) in the Flash memories is active low. By forcing the IO2 line to 0, the OctoSPI interface forces the Flash memory to be hardware write protected. Therefore to issue a single-SPI write instruction tho the Flash memory the IO2 line must be configured as GPIO output=1.

[Bouraoui Chemli]

Hi @Community member​ 

I think that there is a typo in the notation, it should be"..IO2 is in output mode and forced to 0 (to activate the write protect function)..". I will raise this internally.

So, the used memory is write protected but you do not need to set the WP# GPIO to "1" in order to perform write or erase operations. Setting Write Enable bit in the memory's status register is sufficient. If you can share your used memory's datasheet to confirm this.

Bouraoui