STM32L496 GPIO Fails to Fully Drive Output Pin PC1 to 0 V (Used for LDO EN Control)

[Knanou]

Hello,

I am currently using the STM32L496 microcontroller in a product design. In this design, I use PC1 as an output to control the EN (enable) pin of a TPS78228 LDO. I'm encountering an issue where the LDO exhibits unexpected behavior when EN is driven low by the STM32.

 

Setup Details:

• There is a 470 kΩ pull-down resistor between PC1 and the EN pin.

• A 4.7 µF capacitor is connected to VOUT, as recommended.

• When I manually pull EN directly to GND (bypassing PC1, when STM32 is powered-off), the LDO shuts down correctly, with VOUT dropping to 0 V.
• However, when STM drives PC1 low, the EN pin voltage appears close to 0 V, but VOUT remains at 1.8 V.
• Vin is within the recommended range and remains the same in both cases.

I’ve attached two scope captures showing two different behaviors. In both:

• Blue = VEN (EN pin voltage)
• Orange = VOUT (LDO output)

In Figure 1 STM32 is not in use and I manually drive the enable pin to the GND and to VCC interchangeably. As expected, VOUT drops to 0 V when VEN goes low.

In Figure 2, The STM32 is powered on, and PC1 is initially configured low. VEN is low, but VOUT rises to 1.8 V, even though it should be off. When STM32 drives PC1 high, VOUT rises to 2.8 V as expected. When STM32 drives PC1 low again, VOUT only drops to 1.8 V, not 0 V. When the STM32 is powered off, VOUT gradually drops to 0 V.

Questions:

1. Could the 470 kΩ resistor limit the ability of PC1 to drive EN fully low? We tried with a smaller resistor (10kΩ), and we got the same results.

2. Is there any known STM32 GPIO behavior (e.g., leakage current, startup configuration, low-power modes) that could prevent PC1 from sinking enough current?

3. Are there other factors I should be considering? Has anyone experienced similar behavior?

[mƎALLEm]

Hello @Knanou and welcome to the community,

Why is there a 470kΩ pull-down resistor between PC1 and the EN pin?

Do you have a common GND between STM32 and the LDOr? please check.

[Knanou]

Hello @mƎALLEm and thank you for your reply!

The pull-down resistor is placed in parallel from PC1 to GND. 
Also I've checked and there is a common GND for STM32 and the TPS78228 LDO.

[mƎALLEm]

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@Knanou wrote:

Hello @mƎALLEm and thank you for your reply!

The pull-down resistor is placed in parallel from PC1 to GND. 

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I know but why? and why this value of 470k?

Did you test the GPIO PC1 without load (disconnect your LDO)? you set/reset the pin and check the voltage level with an oscilloscope?