cancel
Showing results for 
Search instead for 
Did you mean: 

STM32L476 Tamper Detection – False Trigger Risk During VDD to VBAT Transition?

Oseven07
Associate II

Hello Experts,

I'm using the STM32L476 in one of my projects, with the main system powered at 3.3V (VDD), and a 1.55V coin cell (Murata SR621SW) connected to VBAT for RTC backup.

The tamper pin (PC13) is connected to a normally closed (NC) anti-tamper switch, which means the circuit is only open when the enclosure is physically closed. I've configured the tamper detection in level detection mode with the following settings: 

  1. Sampling frequency: 1 Hz 
  2. Precharge duration: 8 cycles 
  3. External capacitor: 1.8 nF 
  4. Trigger on: Low level

My concern is about the behavior of the RTC and tamper detection circuitry during a power-down event — for instance, due to a brownout or complete power loss. I’ve set the Brown-Out Reset (BOR) level to Level 4.

In such a scenario, when VDD drops and the RTC switches over to VBAT (1.55V), is there any risk of a false tamper detection being triggered because of the voltage transition? I want to make sure the switch from VDD to VBAT doesn't inadvertently cause a spurious tamper event.

3 REPLIES 3
Sarra.S
ST Employee

Hello @Oseven07

Is the tamper pin (PC13) externally pulled up or down when VDD is off? maybe the floating state is causing false tamper events.

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Oseven07
Associate II

Hello, @Sarra.S 

Thank you for your reply.

To clarify, I am only using the internal pull-up resistor. The precharge duration is set to 8 cycles.

Please let me know if you need any additional details.

Oseven07
Associate II

Any Update?