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STM32L431 Spurious RESET on recent component batches

sroll
Associate II

Hi,

when i use sleep mode, i have a reset problem on STM32L431CCT6 only on recent batches.

I implemented the workaround described in section 2.2.5 of dm00218224-stm32l431xx-device-errata-stmicroelectronics.pdf but without success.

The problem only affects recent batches (# 948, 950). The previous batches seem ok (n ° 745, 928).

Any ideas?

Regards

11 REPLIES 11
sroll
Associate II

Hi,

I have found the source of my problem. When the STM32 returns from SLEEP (WFI)  mode with mainregulator in lowpower mode the CPU may read an incorrect value from the Flash memory.

The workarround is to call HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON,PWR_SLEEPENTRY_WFI) instead HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON,PWR_SLEEPENTRY_WFI) to put the STM32 in sleep mode.

conditions to reproduce the problem

 - STM32L431CCT6 from batch 948 or 950 (batches 745 and 928 are OK. I don't know about the others)

 - the STM32 at 80MHz (10, 20 and 40MHz work well)

 - not launch with JTAG or SWD (I presume JTAG and SWD change the SLEEP mode comportement)

 - call HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON,PWR_SLEEPENTRY_WFI) (every ms in my case)

- generate lots of interrupts (UART trafic at 57600baud in my case)

- wait up to 10mn

I hope it could be useful for someone

Piranha
Chief II

Here is a more useful and simple advice - read the documentation! From RM0394:

Section 5.3.5: The Low-power sleep mode is entered from low-power run mode... When exiting the Low-power sleep mode by issuing an interrupt or an event, the MCU is in Low-power run mode.

Section 5.3.2: To further reduce the consumption when the system is in Run mode, the regulator can be configured in low-power mode. In this mode, the system frequency should not exceed 2 MHz.

And you are complaining that it doesn't run at 80 MHz...