STM32L4 - New packages planned?
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‎2015-05-18 10:26 AM
Hello
First of all, congratulation for the power efficiency of the ''new'' STM32F411, at low speed it's actually more efficient than a STM32F0, impressive. But I'm missing one important feature, it hasn't touch sensor channels. I assume that the new STM32L4xx serie, that has touch sensors, will perform even better in terms of power consumption (still no data in the datasheet). But there is a problem. There is no compact QFN48 (7x7mm) or even smaller QFN32 (5x5mm) displayed on the product page. I know there are CSP and BGA versions available, but it need costly and more complex PCBs. Is there at least a QFN48 package version of the L4 planned in the near future (I mean still this year)? Thank you.- Mark as New
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‎2015-05-18 11:05 PM
I thought I would save power moving to the STM32L0 series (from the STM32L1 series) until I realised my audio processing assembly language routines would require almost twice as many instructions - so I am also impressed by this STM32L4 chip.
But I would like the LQFP48 package please,thanks.- Mark as New
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‎2015-05-19 12:32 AM
According to http://www.st.com/st-web-ui/static/active/en/resource/sales_and_marketing/presentation/product_presentation/stm32l4_marketing-pres.pdf , two more sub-families are planned, 'L471 and 'L475. There is no mention of the packages but given they don't have the LCD driver, I guess they may come in smaller packages thant he L476/486.
However, given past experience, I wouldn't expect them out on the street sooner than in a year and a half... JW- Mark as New
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‎2015-05-19 08:56 AM
On Mouser there is also an STM32L472 listed.
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‎2015-05-20 05:49 PM
After studying the more powerful instructions of the Cortex M4, I've realised I could reduce the number of assembly instructions in my filter routines by a factor of two, maybe more.
If the 100uA/MHz for the STM32L4 is accurate, this would be equivalent to me using an STM32L152 chip with a current consumption of 50 uA/MHz or better.The STM32L4 also appears to have much lower ADC current consumption than the STM32L1 (especially if the sample rate is below 20Ksps).When your battery has a maximum current draw of 2milliamp, this gives much needed extra processing power.So I will assume it will eventually be available in the 48pin LQFP and keep optimising my assembly language routines while I wait. After all, some of the competitors already have low powered Cortex M4 processors in a 48 pin LQFP.(FYI, Minimum requirements: 32K RAM, 128K FLASH, low powered ADC, 1 DAC, Bootloader, UART, I2C )- Mark as New
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‎2015-05-26 02:30 AM
Hello,
As you can imagine the STM32L4 family will grow in the current months. :) And several new small packages will be available but it will be in production early next year. Thanks, Regards, Bertrand- Mark as New
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‎2015-06-28 01:10 AM
I've been looking at the reference manual for the STM32L4X6 and I'm pleased to see that there is NSS pulse mode (Motorola SPI master).
This means I can finally DMA direct from my Linear Tech ADC without having to manually control the convert line using an interrupt routine. More processing/power saved.Another reason why I would like this in LQFP48.- Mark as New
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‎2015-09-28 04:40 PM
Maybe ST could bring out a version of the STM32L4 that doesn't have the FPU - especially if it helps get smaller packages out to the market sooner (eg. LQFP48). I don't know about others, but I can manage quite well without the FPU - the more powerful M4 instructions is all I need.
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‎2015-09-28 04:51 PM
I somehow doubt it, you can turn the FPU off (not enable it)
The CPU Core is relatively fractional compared to the foot-print of the peripherals, RAM and FLASH.Up vote any posts that you find helpful, it shows what's working..
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‎2015-09-29 01:42 PM
Although somewhat older, this chip image could give the feeling for things: http://zeptobars.ru/en/read/STM-STM32F103VGT6 - the processor core is the coloured thing in the left bottom corner; the uniform areas on top and bottom are probably two FLASH blocks, the left upper uniform area is probably the SRAM, and the mess in the middle are IMO the synthetized IPs of peripherals plus the bus/matrix (I am no IC expert so I may be completely wrong).
Also, I'd guess that there are less applications utilizing the SIMD/DSP instructions (i.e. those which distinguish M4 from M3, other than FPU) than the FPU, simply beacause while it's highly non-trivial to utilize the former from a HLL such as C, the latter are built-in into every HLL ever since FORTRAN. JW