STM32L15xyE marking layout

waclawek.jan · ‎2016-03-22

Posted on March 22, 2016 at 09:55

In STM32L151xE/STM32L152xE datasheet DocID025433 Rev 8 February 2016, the description of marking of packages (all 5 of them) is titled ''Marking of engineering samples''. This appears to imply that this marking description applies only to the engineering samples.

What is the layout of marking of the production chips, then?

JW

#poor-documentation

Nesrine M_O · ‎2016-03-22

Posted on March 22, 2016 at 16:03

Hi JW,

You are right, the titles of these figures are wrong in the datasheet. Thank you for bringing this issue to our attention.

It is noted and will be fixed in coming release of the document.

-Syrine-

waclawek.jan · ‎2016-03-22

Posted on March 22, 2016 at 16:34

Thanks, Syrine.

Jan