STM32H7S78-DK: Does Read-while-write (RWW) need both XSPI1 and XPSI2 interface?

[rk_iot]

Hello,

in Application Note AN6228 it is stated, that it is possible to perform write-operations on the external flash while running code in memory-mapped mode (Execute-In-Place XIP) on the same external flash memory (on a different bank).

See:

https://www.st.com/resource/en/application_note/an6228-how-to-implement-xspi-readwhilewrite-feature-on-stm32-mcus-stmicroelectronics.pdf

We wanted to use this feature to implement OTA-Updates by executing the application in the external flash and writing the new firmware to the same external flash in a different bank.

The only thing is that is unclear to us is, if and why both XSPI1 and XPSI2 interfaces are needed to perform Read-while-write (RWW) operations?

As stated in AN6228:

To maintain the XIP + RWW feature, the following routine must be used:
1. Configure XSPI2 in memory mapped mode, which allows the MCUs to execute the code directly from the
external flash memory.
2. Configure XSPI1 in indirect write mode.
3. Configure XSPIM in multiplexed mode, then map XSPI1 and XSPI2 both to Port 1 or to Port 2.

Is Read-while-write still possible when XSPI1 is used for accessing HyperRAM on the STM32H7S78-DK board?

Or can the HyperRAM not be used when performing Read-while-write operations to the external flash?

Thanks in advance,

rk_iot

[KDJEM.1]

Hello @rk_iot ;

Yes the RWW needs both XSPI1 and XSPI2 instances 

To implement the RWW feature, the hardware requirements are:
- STM32 products equipped with two XSPIs instances and IOManager (XSPIM).
- External octo flash memory supporting RWW feature, multi-bank architecture (for example, MX66UW1G45G or MX25UW12845G).

The two XSPIs are used to interface with the external octo flash memory in octo mode.

- The first instance is used to execute the code from Bank 0.

-The second instance is used to update data or code in Bank 1 because XSPIM manages the access to the external memory

To benefit from the RWW feature, the XSPIM must be configured in multiplexed mode.

Is my reply answered your request?

Thank you.

Kaouthar

[rk_iot]

Hello @KDJEM.1 

thanks for your reply.

So when using RWW feature the external HyperRAM cannot be used at the same time?

This would would make the RWW feature very limited in use as many applications require external HyperRAM e.g. when using TouchGFX for the TFT Display on the STM32H7S78G-DK which requires the framebuffer to be located in the HyperRAM.

Best regards

rk_iot

[KDJEM.1]

Hello @rk_iot ;

The RWW use two XSPI instances for this purpose and consequently you cannot use HexaPSRAM for your Frame Buffer. An example of RWW configuration is available STM32CubeH7RS: https://github.com/STMicroelectronics/STM32CubeH7RS/tree/main/Projects/STM32H7S78-DK/Examples/XSPI/XSPI_NOR_ReadWhileWrite_DTR

Could you please give more details about the use case? 

Is the HyperRam support the multibank?

Thank you.

Kaouthar

[rk_iot]

Hello @KDJEM.1 

basically we do have an application for the STM32H7S78-DK board with Graphical User Interface.

On the STM32H7S78-DK board an APS256XXN-OBR-BG PSRAM is connected to XSPI1 and used for the framebuffer and other application buffers. On XPSI2 a MX66UW1G45GXDI00 NOR is connected which is used for storing the application. The application is executed in place on the external flash. 

For performing OTA (Over-The-Air) Updates we need to store the new firmware in a section on the external flash.

We found the Application Note describing RWW operations which seems to be suitable for our application, as it says:

Given the increasing demand in automotive and IoT (Internet of Things) applications, flash memory featuring read-while-write (RWW) capability is emerging as a significant trend, which offers an ideal solution for over-the-air (OTA) update applications, allowing the execution of read and write operations simultaneously without stalling or waiting. 

But if the RWW technique does not allow using the PSRAM on XSPI1 any more this is not suitable for our applications as we also require the external PSRAM at the same time.

So basically our requirements are:

+ Support for external PSRAM for storing framebuffer and other data

+ Execute-In-Place from external flash for running the application

+ Writing to the external flash at the same time to perform OTA updates

Best regards

rk_iot

[tdecker2]

My plan to work around this "feature" is to have the bootloader copying the application from XSPI flash to XSPI ram and running the app from there. Then you don't need the read-while-write feature.

[rk_iot]

@tdecker2 we also thought about that workaround but then you need a very big RAM to hold the whole application firmware, which will significantly increase the cost of the device. PSRAM are also limited in size so future feature updates will always be limited by RAM size whereas flash is available in much bigger sizes.

RWW feature would be perfect for OTA updates but it is very limited in use when you cannot use external RAM anymore.