Hello,
in Application Note AN6228 it is stated, that it is possible to perform write-operations on the external flash while running code in memory-mapped mode (Execute-In-Place XIP) on the same external flash memory (on a different bank).
See:
https://www.st.com/resource/en/application_note/an6228-how-to-implement-xspi-readwhilewrite-feature-on-stm32-mcus-stmicroelectronics.pdf
We wanted to use this feature to implement OTA-Updates by executing the application in the external flash and writing the new firmware to the same external flash in a different bank.
The only thing is that is unclear to us is, if and why both XSPI1 and XPSI2 interfaces are needed to perform Read-while-write (RWW) operations?
As stated in AN6228:
To maintain the XIP + RWW feature, the following routine must be used:
1. Configure XSPI2 in memory mapped mode, which allows the MCUs to execute the code directly from the
external flash memory.
2. Configure XSPI1 in indirect write mode.
3. Configure XSPIM in multiplexed mode, then map XSPI1 and XSPI2 both to Port 1 or to Port 2.
Is Read-while-write still possible when XSPI1 is used for accessing HyperRAM on the STM32H7S78-DK board?
Or can the HyperRAM not be used when performing Read-while-write operations to the external flash?
Thanks in advance,
rk_iot
