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STM32H7S: External Memory Loader / manager and Independant SDRAM

halfordC
Associate II

Hey everyone,
I'm currently working with the STM32H7S78-DK.
I'm trying to set up an external memory loader project, executing code from external memory with XIP, while also partitioning out the SDRAM in a few different addressable chunks in the memory layout tool.

But, it seems when I set this up in CubeMX, I'm not able to configure the project in a way where I can partition out the SDRAM by address in the memory configuration page, and also use the external memory loader.
This is based off of attempts to modify the XIP template IOC file.

What's the best way to configure this? Or is it possible with the external memory manager?

Also, if there are resources to help deepen my admittedly shallow understanding of the External memory loader / manager middleware, and bootloader system for the STM32H7? I've found this tutorial:
https://wiki.st.com/stm32mcu/wiki/Getting_started_with_External_memory_Manager_and_External_memory_loader

But I'd love a more datasheet style document to outline all the memory and register stuff that I assume is happening under the hood.

Thanks,
-Hal


EDIT - 09/03/2024

I've done a little more messing with this since this post, so I'll add a little more detail, so I might get some better (any) answers. 

So, I'm starting with the template_XIP project in the STM32H7S78-DK Firmware package. 
The .ioc file there has the external memory manager has memory 1 set to the onboard NOR flash in XSPI2.

halfordC_0-1725413398349.png

Memory 2 is configured as PSRAM, for the external PSDRAM chip on the DevKit: 

halfordC_1-1725413474975.png

The EXTMEM_LOADER is pointed at Memory 1, configured above, for executing code: 

halfordC_2-1725413520669.png

The SPI Configuration is default from the template, with MMT settings unchanged. 

halfordC_3-1725413569262.png

This does not allow the PSDRAM to show up in the memory management tool, and I don't think it gives me direct access to it in my application, to make arbitrary writes to memory addresses. This is my goal. I'd just like to write to the external ram chip like it's any other chunk of data memory. 

 

halfordC_4-1725413696844.png

The code generated from this project compiles and debugs, if you apply the same settings to the debugger as are in the example .project file. Setting bootloader as the first code that runs, then jumping to application code, with bootloader selected. 

My Modifications to this template:

First, on the EXTMEM_MANAGER, I set Memory 2 to "NONE"

halfordC_5-1725413914378.png

Then, I remove XSPI1(PSDRAM) off of bootloader and onto application. 
Also, set the MMT Device type to RAM.

halfordC_7-1725414036665.png

After this, external RAM shows up in the memory management tool, and I'm able to allocate it as I'd like. 

halfordC_8-1725414091439.png

After this, I generate code. 

In STM32Cube IDE, the project builds fine. All the same debug configurations are applied: 

halfordC_9-1725414239558.png

halfordC_10-1725414253236.png

Now, the issue when I debug or try and upload this, is this error: 

halfordC_12-1725414501172.png
With this Disassembly: 

halfordC_13-1725414531534.png


My Questions:
If I had to guess what was going on, It seems like The external memory manager needs a place to execute code from that is fast. I thought that the application instructions in external flash would be loaded into AHB or AXI ram on chip before they would be executed, but it seems to me like they are really getting executed from external PSDRAM. Which I could be totally off base, but if that is not the case, what is the purpose of the Memory 2 section of EXTMEM_MANAGER? I guess it could be putting the ram in some kind of pool for malloc() or something, but it seems silly that I don't have an address for it that I can just write too, unless it's dedicated for instructions. 
Is there a way to do what I'm trying to do? Or is it just not possible with the external memory loader? 
I've searched around a bit more for documentation, and landed on this workshop that was really helpful in deepening my understanding, but I haven't been able to find anything else. 

1 REPLY 1
halfordC
Associate II

Bumping this thread with a big updated in the edited original post.