STM32H750 About Dual-Flash mode program in QSPI

[nonoriri]

Hello,

I may have a misunderstanding about Dual-Flash programming, so my question might seem strange.

In Dual-Flash mode, does the write speed double?

If so, I think the following code cannot achieve double the write speed in Dual-Flash mode. (stm32h7xx_hal_qspi.c)

What are your thoughts on this?

/**
  * @brief Transmit an amount of data in blocking mode.
  *  hqspi QSPI handle
  *  pData pointer to data buffer
  *  Timeout Timeout duration
  * @note   This function is used only in Indirect Write Mode
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_QSPI_Transmit(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout)
{
  HAL_StatusTypeDef status = HAL_OK;
  uint32_t tickstart = HAL_GetTick();
  __IO uint32_t *data_reg = &hqspi->Instance->DR;

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    if(pData != NULL )
    {
      /* Update state */
      hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;

      /* Configure counters and size of the handle */
      hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->pTxBuffPtr = pData;

      /* Configure QSPI: CCR register with functional as indirect write */
      MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);

      while(hqspi->TxXferCount > 0U)
      {
        /* Wait until FT flag is set to send data */
        status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_FT, SET, tickstart, Timeout);

        if (status != HAL_OK)
        {
          break;
        }

        *((__IO uint8_t *)data_reg) = *hqspi->pTxBuffPtr;
        hqspi->pTxBuffPtr++;
        hqspi->TxXferCount--;
      }

      if (status == HAL_OK)
      {
        /* Wait until TC flag is set to go back in idle state */
        status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout);

        if (status == HAL_OK)
        {
          /* Clear Transfer Complete bit */
          __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);

        }
      }

      /* Update QSPI state */
      hqspi->State = HAL_QSPI_STATE_READY;
    }
    else
    {
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
      status = HAL_ERROR;
    }
  }
  else
  {
    status = HAL_BUSY;
  }

  /* Process unlocked */
  __HAL_UNLOCK(hqspi);

  return status;
}

[Tesla DeLorean · Accepted solution]

Well "DUAL" mode in ST Micro speak is two devices bonded in parallel, with one serving even bytes, one serving odd bytes.

For status you must read a pair of bytes to get the values from each IC

The PAGE WRITE now supports a 512-byte buffer instead of a 256-byte one, so you'd push out 512-byte pages, wait for completion on the pair. This effectively doubles the write bandwidth of the QSPI memory. Erase blocks will be 128 KB instead of 64KB,  8KB instead of 4KB, etc.

The erase and write times don't improve, but they do occur concurrently, and twice as much memory gets covered.

[nonoriri]

Thank you for your continuous and kind support.

I have a question regarding the following statement:

The PAGE WRITE now supports a 512-byte buffer

What does "now" mean in this context?

Does it imply that the support is due to a version update of Cube32IDE?

Thank you for your assistance.

[Tesla DeLorean]

Not sure what the version of the IDE has to do with any of this.

Now in the DUAL sense rather than the SINGULAR chip sense. Each chip brings its own 256-byte page buffer for a combined 512-byte page on 512-byte aligned addresses within the address space of the dual chip implementation.