STM32H723ZG Highest USART Baud Rate & Voltage Scaling

[ZChen.3]

The datasheet of STM32H723ZG claims to have a highest USART baudrate at 12.5Mbit/s (with 100MHz kernel frequency and 8 oversampling). But with voltage scaling 0 (VOS0), it is possible to have a higher kernel frequency to 137.5MHz, and therefore the baudrate can be increased to 17.18 Mbit/s. The max system clock frequency they put on the datasheet is 550MHz, which is also based on VOS0.

My question is, why all official docs use 12.5Mbit/s, instead of 17.18Mbit/s? Can we go to or use 17.18Mbit/s for USART without any potential issues? When configuring VOS0, the board will go to the so called "boosted performance", will this performance be degraded after "long time" running, like causing issues of clock deviation/degradation or instability issues?

[Uwe Bonnes]

I agree, the datasheet is unclear about the UART limitations. USART limitations are however given.

[IAS_FFI]

Hi, the max. UART baudrate was updated in datasheet rev3 and is also listed in RM0468 rev3 Table 56. I can also implement and use the higher baudrate in STM32Cube_FW_H7_V1.11.2.

However the IS_UART_BAUDRATE macro in stm32h7xx_hal_uart.h is still capped at 12.5 Mbit/s and throws an assert_failed in the UART config. Now I know I have several ways to get around this, but shouldn't it be updated in the library or am I misunterstanding the allowed UART limits?

[Pavel A.]

For higher bitrates better protocols exist such as LVDS.  

[IAS_FFI]

I know, but I was asking about the implementation of IS_UART_BAUDRATE macro.

[Pavel A.]

Then let's label it as bug report against H7 HAL

https://github.com/STMicroelectronics/stm32h7xx-hal-driver/blob/66b7103d9e146b9e8c5eeab9349855669be40d8a/Inc/stm32h7xx_hal_uart.h#L1294