Hello,
I am trying to use the I3C interface between STM32H523 and DDR5 SPD.
I have found a question would like to be answered:
Is there any way to send the broadcase address (7'h7E) with SCL signal configured in I2C timing characteristics?
According to MIPI I3C Basic specification v1.1.1, page 366, Table 86 I3C Open Drain Timing Parameters
, note 9,The Controller uses this timing to send the first Broadcast Address after Bus initialization, in order to disable the I2C Spike Filter for applicable I3C Target Devices (see Section 5.1.2.2.2) (At least 200ns)
I have selected the "Bus Characteristics" as "Mixed I3C and I2C" and "I2C Duty Cycle" to be 50% in stm32cubeIDE's "Pinout & Configuration -> Connectivity -> I3C1", It generates the code with "hi3c1.Init.CtrlBusCharacteristic.SCLI2CHighDuration = 0x7c;", which seens fine. But when I run the function "HAL_I3C_Ctrl_TransmitCCC", I found the waveform is different, the SCL high duration is actually controlled by the parameter "SCLI3CHighDuration", shown below.
the SCL pulse is around 50ns and It is not responed by the DDR5 SPD Hub;
And the waveform of matherboard is shown below:
And I have not found any good alternative way to generate a start + broadcase Address in I2c timing to tigger it, to generate the waveform like motherboard;
