STM32G4 W25Q128JVSIQ page program issue.

[joe31093]

Hello. I am using W25Q128JVSIQ for flash storage. I am curious if anyone has run into this or a similar issue with using the flash chip with standard SPI.

1: I can program page 0 up to 256 bytes without issues.
2: I can then program page 1 up to 255 bytes without issues.

3: If I program page 1 with 256 bytes, all of the remaining pages (2, 3, 4...) have the same data as page 1 (without any additional programming).
4: if I program page 2 with any data, the page 2 data overwrites page 1 data. And remaining pages have the same data as page 1.

Anyone seen this type of behavior before?

ASCII written to page 0, 1, 2

00_000000000000
01_010101010101
02_020202020202
03_030303030303
04_040404040404
05_050505050505
06_060606060606
07_070707070707
08_080808080808
09_090909090909
10_101010101010
11_111111111111
12_121212121212
13_131313131313
14_141414141414
15_151515151515
16_161616161616
17_171717171717
18_181818181818
19_191919191919
20_202020202020
21_212121212121
22_222222222222
23_232323232323
24_242424242424
25_252525252525
26_262626262626
27_272727272727
28_282828282828
29_292929292929
30_303030303030
31_313131313131
32_323232323232
33_333333333333
34_343434343434
35_353535353535
36_363636363636
37_373737373737
38_383838383838
39_393939393939
40_404040404040
41_414141414141
42_424242424242
43_434343434343
44_444444444444
45_454545454545
46_464646464646
47_474747474747

Flash read

Flash read address 000
00_000000000000
01_010101010101
02_020202020202
03_030303030303
04_040404040404
05_050505050505
06_060606060606
07_070707070707
08_080808080808
09_090909090909
10_101010101010
11_111111111111
12_121212121212
13_131313131313
14_141414141414
15_151515151515
Flash read address 256
12_121212121212
13_131313131313
10_101010101010
11_111111111111
20_202020202020
21_212121212121
20_202020202020
21_212121212121
00_000000000000
01_010101010101
02_020202020202
03_030303030303
00_000000000000
01_010101010101
00_000000000000
01_010101010101
Flash read address 512
12_121212121212
13_131313131313
10_101010101010
11_111111111111
20_202020202020
21_212121212121
20_202020202020
21_212121212121
00_000000000000
01_010101010101
02_020202020202
03_030303030303
00_000000000000
01_010101010101
00_000000000000
01_010101010101
Flash read address 768
12_121212121212
13_131313131313
10_101010101010
11_111111111111
20_202020202020
21_212121212121
20_202020202020
21_212121212121
00_000000000000
01_010101010101
02_020202020202
03_030303030303
00_000000000000
01_010101010101
00_000000000000
01_010101010101
and so on...

STM32G4 setup.

[Tesla DeLorean]

>>Anyone seen this type of behavior before?

No, this is all you.

Make sure you've got the address width right, these would be 24-bit addressable devices, not 32-bit

Dummy / Alternate cycles? On reads, probably more salient on QSPI / OSPI HW

Show the actual code doing the w25qxx interactions

Addresses must be aligned, you must wait for the PAGE WRITE to complete.

What do SR1 / SR2 contain?

[joe31093]

SR1 = 0x00, SR2 = 0x02. I am using Lars Boegild Thomsen's files (with modifications) to erase, write and read (24 bit address). https://stm32world.com/wiki/STM32_W25Qxx

1: Erase sector 0

2: Write at address 0, 256 bytes. (I copy the bytes in to serial program that sends the data to micro-controller, good second or two between each page writes.)

3: Write at address 256, 256 bytes.

4: Write at address 512, 16 bytes.

5: Read back data from page 0 to 15.

[joe31093 · Accepted solution]

Removed w25qxx, installed https://github.com/nimaltd/spif resolved the issue. Thank you.