STM32F7 NAND FLASH ECC - Is Hardware BCH ECC Supported?

[stcom9174]

Posted on September 06, 2016 at 11:59

Hello All,

If I am using one of the NAND FLASHes from Spansion (Cypress) such as the S34ML08G2 - is BCH ECC supported in hardware?Thanks,John W. #stm43f7-fmc

[waclawek.jan]

Posted on September 06, 2016 at 15:21

RM0385 13.6.6:

The ECC algorithm implemented in the FMC can perform 1-bit error correction and 2-bit error detection per 256, 512, 1 024, 2 048, 4 096 or 8 192 bytes read or written from/to the NAND Flash memory. It is based on the Hamming coding algorithm and consists in calculating the row and column parity. JW

[Tesla DeLorean]

Posted on September 06, 2016 at 17:03

Generally there has been a movement to letting the NAND chips compute and check syndrome data as the bit level and array structures have become more exotic/complex. The chip vendor should be able to supply host level ''correction'' software/drivers that can resolve error flagged in the checking process.

[stcom9174]

Posted on September 08, 2016 at 12:24

Does ST have a list of compatible NAND FLASH memories for their microcontrollers?

Thanks.