STM32F437VI

[hariharan]

Posted on September 22, 2014 at 08:05

Hi 

This is a very general question. I am new to cortex M4 processors. I would like to know if I can use a piece of code written in a cortex M4 processor (say STM32F437VI) in any of ST's cortex M0+ or M3 processor, as long as the piece of code uses only the instructions available in cortex M0+ or M3 cores. Or would the ISA being different cause any issues?RegardsHari    

[chen]

Posted on September 22, 2014 at 12:16

Hi

''I would like to know if I can use a piece of code written in a cortex M4 processor (say STM32F437VI) in any of ST's cortex M0+ or M3 processor, as long as the piece of code uses only the instructions available in cortex M0+ or M3 cores.'' No and Yes. There are 2 different aspects to this question : 1) Compiler - high level C to asemmbler (and the thumb mode) Generally speaking, so long as the code in C is generic and the correct compiler setting are set (including the correct 'ARM Thumb mode') then the compiler should be able to generate code. 2) Processor specifics eg Peripheral registers. You mentioned 1 specific processor  - STM32F437VI and 3 different ARM variants (cortex M0+, M3 and M4) All three are a variant of the original ARM7 (I think) but each has been modified. The M0+ is targeted for very low power application (sacrificing performance for low power) The M4 is the same as the M3 but has a Floating point co-processor part. ST do many different ranges L0, F4 etc Each is centered around a different ARM Cortex M series Then each part has different peripherals to target a specific market. Code which is for a specific part will probably have references to specific peripheral registers - this will probably not be portable. (You may be able to port code from one part in a ST family range to another part in the same family eg STMF405 to STMF407 but there will be differences in peripherals that need to be sorted out. It is much harder but not impossible to port from 1 ST family part to another ST family, again due to peripheral and register definitions) In fact different parts have peripherals or not depending on what the part is targeted towards.

[hariharan]

Posted on September 23, 2014 at 09:03

Hi 

Thanks for the reply!For my project, I would like to write some code modules in C and test to see what the minimum core frequency required would be, in each case, if I implement the code in cortex M0+, M3 and M4 cores. I am not concerned too much about peripherals. I will be processing ADC samples and using SPI and USB interface mostly. That's all!Can anyone recommend the best way to achieve this? Will buying a Cortex M4 180 MHz evaluation board help me to conduct this analysis?RegardsHari 

[chen]

Posted on September 23, 2014 at 10:13

''I am not concerned too much about peripherals. I will be processing ADC samples and using SPI and USB interface mostly. That's all!''

The ADC, SPI and USB are the peripherals I am talking about! Read the data sheets and reference manuals for the devices and you will see what I mean! They vary between each ST family and will require effort in porting between them. ''For my project, I would like to write some code modules in C and test to see what the minimum core frequency required would be, in each case'' ''Can anyone recommend the best way to achieve this?'' I am sure someone can tell you BUT only if you tell us what it is you are trying to do. So far you have not given enough information for anyone to give you a sensible answer. ''Will buying a Cortex M4 180 MHz evaluation board help me to conduct this analysis?'' It is a start but you have not said what you are trying to do.

[frankmeyer9]

Posted on September 23, 2014 at 10:55

In general, the M0/M0+ instruction set is a subset of the M3 instruction set, and this, in turn, is a subset of the M4 instruction set.

In theory, you can generate M0 instructions to execute then on a M4 core. This is not a common use case, as it is a waste of ressources, and you might need to tweak your toolchain to achieve this. In your place, I would thoroughly evaluate the project requirements, especially in regard to needed peripherals and performance. Since evaluation boards are cheap, you won't lose much if you start too low, i.e. with a M0 board. But by trying to run the same code on M0, M3 and M4 cores, you get a rather distorted image. Commercial projects mostly use the smallest possible core, and squeeze out as much as possible.