STM32F429 LTDC

[arlleex]

Posted on February 25, 2015 at 20:12

Hello! Sorry for my English.

I try to understand the controller LTDC STM2F429.1) Maximum resolution TFT 1024x768. However, the registers of the total width and height of the display are 12 bit and 11 bits, respectively. This 4096x2048 pixels, respectively. Why so? Why so much? I have not seen displays 1024x768, where total width and height are very large.2) Why some registers for the width and height of the display? Why accumulate several registers contain values? Why accumulate? Why not: separate registers for HSYNC, HBP, Active width, HFP?The same goes for the registers length and step color buffer - judging by of reference manualthe length of the line is a step + 3. Why it could not be done internally? Or is it some feature? Why so?3) Why in register of number of lines (LTDC_LxCFBLNR) number of 11 bits (a maximum of 2048 lines of a frame). But you can connect a maximum display 1024x768, i.e. 768 lines. Why 11 bits instead of 10? What is the reason?It is interesting to me personally. I wonder why it is so, why is the engineering solution. And, to be aware of possible tricks software graphics acceleration (except DMA2D).

[Tesla DeLorean]

Posted on February 25, 2015 at 20:19

2) Because it's easier to just build a comparator against a singular counter?

Yes you can build an adder in hardware, but it takes a lot of gates, uses more energy, and creates critical paths. Easier to have the initialization software compute the fixed value ONCE and write it into a register and do a ONE-to-ONE comparison in hardware.

[Tesla DeLorean]

Posted on February 25, 2015 at 20:26

3) What if the display manifests as 720 x 1280, or some display that doesn't fit your convenient VGA, 4:3, 16:9 ratios, or is just rotated?

The limitations are one of AREA, and if you count colour depth VOLUME, the amount of memory behind the image, and bandwidth with which it has to transfer that memory. Don't focus on the length of the sides alone.