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STM32F429 DISCO LSE wont work

yoshi
Associate II
Posted on August 22, 2014 at 10:37

Hi,

I'm compiling Demonstration on STM32F429I-Discovery_FW_V1.0.1 was work fine.

Now I fixd RTC_Configuration() on rtc.c for 32.768kHz LSE driven as below:

int8_t RTC_Configuration(void)

{

  RTC_Error = 0;

  /* Enable the PWR clock */

  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);

  /* Allow access to RTC */

  PWR_BackupAccessCmd(ENABLE);

/* LSI used as RTC source clock */

/* The RTC Clock may varies due to LSI frequency dispersion. */  

  /* Enable the LSI OSC */

  RCC_LSEConfig(RCC_LSE_ON);

  /* Wait till LSI is ready */ 

  while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)

  {

  }

  /* Select the RTC Clock Source */

  RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);

  

  /* Enable the RTC Clock */

  RCC_RTCCLKCmd(ENABLE);

 

  /* Wait for RTC APB registers synchronisation */

  RTC_WaitForSynchro();

 

  /* Calendar Configuration with LSI supposed at 32KHz */

  RTC_InitStructure.RTC_AsynchPrediv = 0x7F;

  RTC_InitStructure.RTC_SynchPrediv  = 0xFF; /* (32KHz / 128) - 1 = 0xFF*/

  RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;

  RTC_Init(&RTC_InitStructure);  

  return RTC_Error;

}

But It won't count up when device running.

X2 crytal is mounted 32.768kHz/6pF, C23/C24 Capacitors are 6.8pF.

and also VBAT is powerd by 3V coin cell. R53/R54 are shorted.

Is this careless oversight?

Tyro
3 REPLIES 3
Posted on August 22, 2014 at 16:40

But It won't count up when device running.

 

X2 crystal is mounted 32.768kHz/6pF, C23/C24 Capacitors are 6.8pF.

 

and also VBAT is powered by 3V coin cell. R53/R54 are shorted.

 

Is this careless oversight?

SB16 and SB17 removed? Can you see it the oscillator functioning? Directly, and then indirectly via MCO, or TIM (9 or 12 as I recall)

R52 removed for battery?
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yoshi
Associate II
Posted on August 23, 2014 at 00:54

>SB16 and SB17 removed? Can you see it the oscillator functioning? Directly, and >then indirectly via MCO, or TIM (9 or 12 as I recall)

Removed. I don't have Osilloscope on hand just now, but can use it in workspace. I'll try it.

>R52 removed for battery?

R52 has already removed.

I guess, X2(32.768kHz crystal) must be mounted on the DISCO's first lot.

In the present lot, ST omitts X2 mount for costdown?

Because X2 exists at UM1670 User Manual DocID025175 Rev 1 which is downloadable still now.

and, we can find at rtc.h as:

/* Exported constants -----------------------------------------------*/

#define RTC_CLOCK_SOURCE_LSE

//#define RTC_CLOCK_SOURCE_HSE

//#define RTC_CLOCK_SOURCE_LSI

but RTC_CLOCK_SOURCE_LSE is not used in FW_V1.0.1. Is #ifdef deleted?

So, I think that applicable source code must be described in STM32F429I-Discovery_FW_V1.0.0 or before.

tyro

yoshi
Associate II
Posted on August 24, 2014 at 08:23

Supposably problem solved...

There was no

problem

in the source code.

I tried LSE after LSI drive but I forgot presence of active VBAT by coin cell.

I just noticed when insert following code and working well on LSE:

int8_t RTC_Configuration(void)

{

...

PWR_BackupAccessCmd(ENABLE);

/* Reset RTC Domain */

RCC_BackupResetCmd(ENABLE); // insert then problem solved, and

RCC_BackupResetCmd(DISABLE); // already commented out for normal operation

RCC_LSEConfig(RCC_LSE_ON);

...

}

I need more validation about backup domain.

Thank you for your answer clive1.

tyro