STM32F373CBT6 keeps crashing even at simple non trivial task

[megahercas6]

Posted on May 10, 2015 at 09:41

Hello, i designed board with STM32F373, since i don't need lot of speed, and low pin count will save me some space. ( this is first time i not used STM32F4 series, that works every time with little or no trouble)

Problem i am having is even at simple task, like SetBits( GPIOD, GPIO_Pin_10) it goes to void HardFault_Handler(void) loop. This is just nuts ! If i use GPIOD->BSRR = GPIO_Pin_10;  i get no problems. Same happens with my other program parts, like using adc, sdadc and so on. I can't get it working without crashing. Where is no word to describe how i want to throw it to wall at the time. I never had this problem with STM32F4. I used templates from examples folder, i did set HSE to 16MHz instead if 8MHz as stated is STM32, and yes, i am using 16MHz My program crash after few seconds, and at that short time, it looks like it does what it needs to do. Sometimes command goes out of memory, like it missed my asm code, and just go where no code is left ! Anyone knows what could be wrong ? is it compiler ? My hardware is sound, i triple checked everything, voltages are good, not heat, no weird stuff, nothing.

[Tesla DeLorean]

Posted on May 10, 2015 at 17:08

I'm pretty sure you're going to need to modify system_stm32f3xx.c to address the change in source clocks, and the PLL multipliers. I don't think HSE_VALUE does that, it just gives things like the baud rate code the right constants to work backward from.

[Tesla DeLorean]

Posted on May 10, 2015 at 17:31

Indeed, Keil syntax probably not going to wash with IAR

In system_stm32f3xx.c (also attached)

/* PLL configuration: PLLCLK = (HSE / 2) * 9 = 72 MHz */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | 
RCC_CFGR_PLLMULL9);

________________ Attachments : system_stm32f30x.c : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0o8&d=%2Fa%2F0X0000000bdv%2Fhc6XvyiO7Y6sdrxhwEh2EfIZPISCwV7.O19qIh5gnq8&asPdf=false

[megahercas6]

Posted on May 10, 2015 at 17:34

Yes, then you pointed PLL setup, and at first i was unable to find PLL_M and PLL_N definitions as is STM32F4, i asumed it will calculate based on HSE (well, it is easy to do)

RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL5);//RCC_CFGR_PLLMULL9);

It should give 80MHz instead of 144MHz