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stm32f373 single ended zero reference mode SDADC

markus2
Associate
Posted on July 08, 2013 at 12:54

Hi.

Just to be sure (because the manual is not very clear in this case..):

When the manual states that in single ended zero reference mode the offset is dependend on gain variations it practically means that i can ac-couple (via capacitor) any ac signal to the SDAC and that the mcu will automatically inject an offset corresponding to the actual gain setting, so that 0 volts will be (at the end) resulting in a value at the mid of the adc range.

It is completely unclear what actually happens in this mode. The manual only states that an offset is injected. Does this happen in the analog section? Does it mean I can superpose it with a negative voltage?

m.

#stm32f373-sdac
1 REPLY 1
markus2
Associate
Posted on July 09, 2013 at 19:51

will this work coupling ac-signals to a differential mode SDADC when I want to use different analog gain settings? I want the DC-offset not to be amplified.

Is there a more simple way?

See attached picture.

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Attachments :

prinzip_sdadc_anbindung.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0nu&d=%2Fa%2F0X0000000bdu%2FcTclB5OqWcw.ExApvig9IF99u4mOrUtn7wUoqmtU8yE&asPdf=false