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[STM32F30x.h] Bit mask error for RCC_AHBRSTR_XXXX

hohee
Associate
Posted on May 22, 2014 at 04:27

hi,

I found there is a problem with the bit mask for the RCC AHBRSTR Register in the

stm32f30x.h.

  * @file    stm32f30x.h

  * @author  MCD Application Team

  * @version V1.0.0

  * @date    04-September-2012

#define  RCC_AHBRSTR_TSRST                   ((uint32_t)0x00100000)

#define  RCC_AHBRSTR_ADC12RST           ((uint32_t)0x01000000)

#define  RCC_AHBRSTR_ADC34RST           ((uint32_t)0x02000000)

I think the bit mask position for TSRST (bit 24), ADC12RST (bit 28), and ADC34RST(bit 29) is wrong.

is this a known problem?
4 REPLIES 4
Posted on May 22, 2014 at 15:28

is this a known problem?

Hard to say, though it does seem to be one.
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schauer
Associate II
Posted on May 22, 2014 at 16:05

I'd rely on the user manual and would shift all three constants one nibble (4 bit) left. You then could also fix the GPIO constants....

Especially as the RCC_AHBENR_* constants are defined as described in the reference manual and I'd be willing to assume that the registers are designed the same way.

One thing you could do is updating the library, as there currently is v1.1.1, but I checked it and those defines would be the same ;)

Amel NASRI
ST Employee
Posted on May 22, 2014 at 18:46

I Confirm the issue, this should be fixed in next STM32F3 standard peripheral library release.

You can update the stm32f30x.h file like this waiting for this release:

#define RCC_AHBRSTR_GPIODRST((uint32_t)0x00100000)/*!< GPIOD reset */ 
#define RCC_AHBRSTR_GPIOFRST((uint32_t)0x00400000) /*!< GPIOF reset */ 
#define RCC_AHBRSTR_TSRST((uint32_t)0x01000000)/*!< TS reset */ 
#define RCC_AHBRSTR_ADC12RST((uint32_t)0x10000000)/*!< ADC1 & ADC2 reset */ 
#define RCC_AHBRSTR_ADC34RST((uint32_t)0x20000000)/*!< ADC3 & ADC4 reset */

-Mayla-

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Posted on May 23, 2014 at 14:59

Hi,

As said Mayla, the bug is confirmed and will be fixed in the next release of the STM32F3xx_StdPeriph_Lib.

With regards.