stm32f1x lowest power run mode

[Martijn Jonkers]

Posted on March 13, 2016 at 15:26

Hi,

I was looking into the stm32 architecture.And i have some questions about achieving the lowest power consuption while staying operational.Example: A simple application that every 10 seconds needs to send 20 bytes of data over the USART peripheral at 4800 baud (DMA not used).The CPU can prepare a byte, then go to sleep. when the usart is finished sending a byte, it needs to wake the cpu to prepare the next byte, until there is nothing to send anymore.I already learned I can put the CPU in sleep mode, until the transmission is due. I have done this by enabling the RTC and use the RTC alarm to wake the CPU from WFI (not stop or standby mode). Now I would like to optimize the USART and RTC more. I was playing around with the APB1 USART/GPIO/AFIO clock and noticed I can shut it down when USART is not used. Also I noticed that the clock to the PWR peripheral needs to be enabled to enable the power to the RTC, fine with me. But in none of the examples I found the clock to the PWR peripheral is stopped again, this is just a wast of power, right?What I did was: start PWR clock, start RTC power, stop PWR clock. And RTC just works fine. Why is the PWR clock not stopped in all the examples?This is the same for the USART/GPIO/AFIO clocks. why keep them running when not used?Then I had a last question: Is the HSI clock stopped when no resource is requesting it?Or is it only stopped when I enter WFI and the DEEPSLEEP bit is set in the Cortex Core? I hope it is possible, because that would mean the USART can continue doing its thing while the CPU is sleeping. Until the clock to the USART etc.. is stopped. #stm32f1 #power #amps

[Radosław]

Posted on March 13, 2016 at 15:36

F1 for this purpose is bad choise. Use L0. Very low power. UART can work in stop mode etc LSE is needed.

WFI/ WFE clock is stoped only for core.  In deep sleep all clocks are off and only few signal can wake mcu.  Clock gating don't mutter. speccially in F1. On only what you need. desabling clocks  is usually calling for troubles.  

[Martijn Jonkers]

Posted on March 13, 2016 at 15:44

It is only for me to understand stm32f1, not really a usefull application.

I am trying to learn how to cope with APB clocks etc.., HSI/E and CPU etc. When to shut them down and keep them running.Does the L series have more advantages, can you tell me some pros/cons for L and F maybe?

[Radosław]

Posted on March 13, 2016 at 16:57

1. L series have MSI clock very low power. HSI(100uA)

2. L series have more wakeup sources.  F1 have only External interrupt,  PVD, RTC, USB, Ethernet. Check table 11. in RM for F1. WFI,  clock only for core is stoped.  wakeup by any interrupt. Stop Mode - clock source is off, wakeup only by exti lines. Standby Mode - all clock is off,  wakeup only by few of EXTI lines. This is for all STM32. L series have MSI, have more exti lines - more wakeup sources.  L0 L4 have I2C and USART which can work with RTC clock.  F1 is vary bad choise for learning this modes, M3 have some problem with  this speccially F1,  becose this is not last core revision.

[Tesla DeLorean]

Posted on March 13, 2016 at 17:01

The F1 series is pushing 10 years old, ST has sharpened their game in the intervening years with better and lower power designs. The Cortex-M0 is a less complicated design.

You need to stick your device on a power analyzer to get a clear handle on what your use case is doing. Often the most power is drawn by external devices connected to the part. Switching off the APB clocks to peripherals where little change is occurring will be negligible, unless you are writing to the GPIO registers constantly, nothing is changing and the clock isn't gating very deeply into the design. The pin drivers themselves are where the real current is going to be drawn, and this will depend on how much, and how aggressively you have the pins banging up and down. Changing state is where CMOS draws it's power. I'm not sure why dealing with the output a byte at a time is at all helpful to reducing power. Preparing 20 bytes, setting up DMA, and sleeping until that is complete would seem to offer a direct decimation of processor execution time, and this is where the fastest and most aggressive logic is situated.

[re.wolff9]

Posted on March 13, 2016 at 21:29Still in the datasheet they quote a significant current for peripherals like the first one or two GPIO ports. As those numbers are always ''best case'' they were probably not toggling any IOs when they measured that.... 

[Tesla DeLorean]

Posted on March 13, 2016 at 21:46

I still think that turning off the clock on static GPIOs is going to make next to no difference, it does not remove the power from the unit (ie a ON/OFF switch). What will make a material difference is turning off the pin drivers, and schmitt trigger inputs, by putting the pin in Analogue Input mode.

[Martijn Jonkers]

Posted on December 08, 2016 at 21:30

A few months later and here we are again.

I learned a lot about stm32F and L families.

I am capable of running my application on a stm32F0 with 5uA in stop mode.

I implemented by own versions of the peripheral clocks enable/disable so i can manage clocks usage, system wide, and when no clocks are requested i shutdown down the HSE/I by going into stop mode, otherwise keep it running and go into sleep mode.

To reach this low power state, I do need to disable the individual periperal clocks.

I also set unused pins to an analog input state, this alone saves about 100uA per port.

This way each peripheral driver manages it's own clocks and when all drivers are off the systems auto magically shuts off.

To continue when the RTC interrupt tells the CPU to do so.

The only thing I absolutely hate on all non F1 devices is the RTC! Where is my simple basic counter value?