STM32F107 PLL settings
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2010-02-03 8:12 AM
Posted on February 03, 2010 at 17:12
STM32F107 PLL settings
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2011-05-17 4:38 AM
Posted on May 17, 2011 at 13:38
Hi Fante,
You have missing one note ;) The PLL3VCO = 2*PLL3CLK So in the example, PLL3VCO = 2 * PLL3CLK = 2 * 55 = 110 MHz, The PLL3VCO clocks the I2S peripherals. Abstract from RM008: ''
The I2S2 and I2S3 clocks which can be derived from the system clock (SYSCLK) or the
PLL3 VCO clock (2 × PLL3CLK). This selection is made through the I2SxSRC bit in the
RCC_CFGR2 register. For more information on PLL3 and how to configure the I2S
clock to achieve high-quality audio performance, please refer to Section 23.4.3: Clock
generator.
'' Ciao