STM32F103 I2C Slave strange behaviour [Solved]

[dman]

Posted on May 16, 2016 at 15:24

Hi,

I have a STM32F103 MCU with I2C2 enabled and configured as slave (ID 0x28h). I also have a STM32F429 MCU with I2C3 as Master.I've found an Optimized I2C Examples on ST's website and I've used that as a base. All I am trying to do is send 3 bytes of data from Master to Slave (id 0x28h). But what happens is that the address byte it sent and ACKed by the slave, then the data byte is sent but is NAKed by the slave.If I let the slave run but restart the Master, this time all data is transferred and the Slave produces ACKs on all other bytes. If I restart the slave and cause master to send data again, the Slave ACKs the address byte but NAKs the data byte.My bus is running at 100kHz with 4.7kOhm resistors from 5V. Fundamentally it's clear that comms work ok. I've noticed that both MCUs show flag I2C_FLAG_AF. My understanding that the hardware produces the ACK, but how can the same software not work for the first message, but work for the second message.I have also attached 2 images showing the Slave NAKing on the first message when its powered and the second image showing the same message going through after master sends the second message.

[dman]

Posted on May 17, 2016 at 14:51

I have found my problem.

I was reading using the I2C_CheckEvent() function which reads the SR1 and SR2 thus clearing them. So later on the actual code was also reading them but the SR1 was already reset so it could not do anything.Still does not explain how the code would work on the second message.

[Walid FTITI_O]

Posted on May 20, 2016 at 12:52

Hi narsutis.dainius,

You should ensure that you have followed the recommendation descibed in the relevent application note

http://www.st.com/content/ccc/resource/technical/document/application_note/5d/ae/a3/6f/08/69/4e/9b/CD00209826.pdf/files/CD00209826.pdf/jcr:content/translations/en.CD00209826.pdf

, whether you are communication by polling , interrupt or DMA. -Hannibal-