STM32CubeMX 4.9.0 STM32F7 Clock Configuration CLK48 Clock Mux BUG?
Options
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content
2015-08-02 10:48 AM
Posted on August 02, 2015 at 19:48
Hi,
In setup for STM32F746G-DISCO, FW_F7 V1.1.0
In Clock Configuration, when selecting PLLSAIP @ CLK48 Clock Mux for USB,
it generates code
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLP_DIV4;
which should be
PeriphClkInitStruct.
PLLSAI
.
PLLSAIP
= RCC_PLLSAIP_DIV4;
This discussion is locked. Please start a new topic to ask your question.
1 REPLY 1
Options
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content
2015-08-17 1:44 AM
Posted on August 17, 2015 at 10:44
Dear user,
Thank you in reporting this issue. The bug will be resolved in release 4.10.