2015-11-14 11:37 AM
Hello
Is there any document from ST out there which actually explains how fast and slow ADC channels in some devices (e.g. the stm32l4 has them) differ? The only real information the datasheets hold is the absolute maximum sampling rate. So for example the stm32l4 datasheet says: Fast channels: 0.188 μs for 12-bit resolution (5.33 Ms/s) Slow channels: 0.238 μs for 12-bit resolution (4.21 Ms/s) And thats about it. So what does this mean now? Are slower channels always slower or just not capable of performing conversions under 0.238µs? Let's say I set up one ADC to perform continuous conversions on one fast and one slow channel. Both channels are configured to perform a conversion in 300 cycles which we assume is way slower than 0.238µs... Are both channels running at the same speed? tia2015-11-15 06:40 AM
It takes a bit of interpretation to figure out what is happening.
Apparently slow channels have a higher input impedance and/or capacitance than fast channels, so the sampling capacitor takes longer to charge up to within 1/4 LSB of the input voltage. The conversion still takes the same 12, 10 or 8 cycles, but the 1/4 LSB accuracy won't be achieved at 2.5 sampling cycles. Instead of ''NA'' in the STM32L476 Data Sheet Table 63, I would prefer to see a footnote stating that conversion at 2.5 cycles is achievable, but conversion accuracy may be significantly degraded. Cheers, Hal