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STM32 Clock, Flash, and USB

mvi
Associate II
Posted on April 16, 2008 at 02:54

STM32 Clock, Flash, and USB

24 REPLIES 24
mvi
Associate II
Posted on May 17, 2011 at 12:28

Hello!

This is my first post so sorry if things sound too basic! ;)

1) I am using the HSI and PLL to get a SYSCLK of 48MHz which isnt so accurate, How much latency should i choose to be sure it works well. Since the RC prodocing is temperature dependent... the SYSCLK could change around a bit... as I understand. So is it safer to pick 2 latency cycles? Although it works with one.

2) Since the halfcycle flash access works with a clock under 8MHz, I cant use it cause of the PLL. Im going to enable the prefetch buffer. This is ok from what i understood?

3) I want to setup a system where I use a 32.768 KHz LSE to automatically calibrate the HSI and UART. I was thinking of running a two counters on the LSE and HSE. Then use a compare function to adjust the HSI. This is done online. The question is there a way of doing this in hardware instead of software. I was thinking whether it is possible to feed the HSI and LSE to an internal timer and use a compare reg to generate an interrupt to change the calibrate value. Is this possible?

4) Using the USB COM Port Example from ST, I tried to send more than a single character at a time. This results in garbage printed on the pc. Although single character at a time works. Is this a buffer issue?

Thanks!

giles
Associate II
Posted on May 17, 2011 at 12:28

1)

less that 24 = 0 latency,

24..47 = 1 Latency,

48+ = 2 Latency

You are correct that you cant use half cycle access above 8Mhz,

2)

I have Prefetch turned on running at 72Mhz no probs so i'd guess thats fine

3) I'm not aware of a way you can do this in hardware, the only way i can see of doing it is calculating an error over a period measured against RTC.

4)sorry no clue here.

[ This message was edited by: giles on 08-04-2008 16:24 ]

mvi
Associate II
Posted on May 17, 2011 at 12:28

Hi Giles,

Thanks for the reply.

Regarding 1) The datasheet states ''24MHz < SYSCLK <= 48MHz'' for 1 latency cycle. Did you mention 2 latency states for 48MHz just to be on the safe side?

The rest, except the USB, are cleared.

If someone else knows about the USB problem, Id be glad to hear about it.

Thanks,

-Mad

giles
Associate II
Posted on May 17, 2011 at 12:28

Sorry, i did it right in my code just wrote it wrong here you are right:24MHz < SYSCLK <= 48MHz

*Embarresed*

lanchon
Associate III
Posted on May 17, 2011 at 12:28

hi,

1) people are overclocking the flash using 1 cycle latency at 72MHz with no problems (0 doesn't work). this is of course not recommended but goes to show that margins to accommodate process variations must be large. you're worried that 48Mhz plus 2% error is more than the 48MHz limit of 1 cycle latency. and you're right that technically this would be out of spec, but there's no way the flash can be that sensitive and exact. think that the HSI is designed to be exact, and then it's calibrated, and still there's a small error. on the other hand the flash is definitely not designed to be a precision frequency discriminator. use the 1 latency option with confidence.

2) yes, enable prefetch, and do it before changing other settings.

3) maybe you can use a capture in TIMx with a signal from the LSE, ideally without external signal routing, you'll have to check. otherwise, use a high priority periodic interrupt to read the value of the other timer. consider posting your results, this is interesting as a cost cutting strategy. maybe ST should work on a solution.

4) the virtual com code has issues involving data races. check out my post from yesterday, I attached something that works fine AFAICT, though it has very little testing. (it still depends on a lot of ST's code that I haven't verified.)

mvi
Associate II
Posted on May 17, 2011 at 12:29

Hi Lanchon,

That was very helpful indeed. Thank you.

Regarding your VCOM code I downloaded, Could you mention what files you have changed, if its not too much trouble. Maybe you already know of a program that could do this!

-Mad

mvi
Associate II
Posted on May 17, 2011 at 12:29

Hello again!

Maybe I should state what Im trying to achieve with respect to the USB.

I have the USB connect as a Virtual COM Port and the USART1 connected without flow control. I opened up 2 terminal windows on the PC each connected to the VCOM and USART COM respectively.

When I send a string ''0123456789'', for example, from the VCOM it has to be recieved on the other. This transmission has to be bidirectional. As of now, this cannot be achieved with the Virtual COM Port Sample Code from ST, although single character at a time works without a problem.

My understanding of USB is limited and I havent had time to delve into ST's code.

Thanks for any comments/help.

-Mad

lanchon
Associate III
Posted on May 17, 2011 at 12:29

I have no idea about what I changed. Data races happen where they can: between the interrupt handler and ''main'' code (including USB_Init() and data I/O code).

I recommend WinMerge (GNU GPL) for the windows platform.

lanchon
Associate III
Posted on May 17, 2011 at 12:29

> My understanding of USB is limited and I havent had time to delve into ST's code.

my sentiments exactly. check out the interaction between endp.c and main.c.