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SPI pausing mid-byte

Associate II

Hi all,

I am having a very strange problem with an SPI read operation on the STM32F103ZG.

I am using the SPI bus to read from an external ADC device. I am performing around 1000 reads per second and almost all of them are coming back perfectly, but once every 10 seconds or so (quite random timing) one of them fails. 

I have put a logic analyser on the SPI bus and what I am seeing is that the SPI is actually pausing in the middle of a byte.

Here you can see the normal, successful, SPI read.  I place a byte in the DR and we can clearly see it clocking the read command 



When the read operation fails, I see the following:


You can clearly see that the first five or six bits get clocked, but then the operation just seems to pause for round about 175us (plus or minus a few us) before starting up again and finishing the operation.  

I'm pretty confident that there are no higher priority interrupts preempting this code execution, but even if there were, it's my understanding that it wouldn't matter. Once the byte is in the DR and the transmit operation begins, it should continue to completion regardless of what the rest of my code is doing?

Can anyone suggest a reason why this may be happenning?



Lead II

I suppose that could happen if you turn off the clock to the SPI peripheral. Might you be modifying the relevant RCC->APBENR elsewhere in your code?

Thanks for the quick reply. 

Unfortunately, no. That register is set when the program first initialises and then is never touched again.

Just to confirm, I have checked the contents of RCC->APB1ENR and RCC->APB2ENR on both good and bad reads, and there is no change to the register contents.