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SPI communication between two STM3 boards

Pluto7
Associate II

Hi All,

Hope you are doing well.

I am working on SPI communication between two STM32 boards (F7 as master and WB55 as slave), but I am encountering issues with reliable data transfer.

The problem arises with the transfer of 2-byte data packets. Initially, the data is transmitted successfully for a certain number of iterations, but after that, the received data becomes corrupted. Additionally, there are instances where the received data is incorrect from the very beginning of the communication.

I am using the example SPI communication code provided by STM32, with one board configured as master and the other as slave.

Has anyone experienced similar issues or can provide insights on how to ensure more reliable data transfer between the boards?

MY SPI Settings:

ParametersMasterSlave
Data Size8 bits8 bits
First BitMSB  FirstMSB  First
CPOLLowLow
CPHA1 Edge1 Edge
MOSIPull DownPull Down
MISOPull DownNo pull up and No pull down
SCKPull DownNo pull up and No pull down


Any help or tips on this will be helpful.

Thanks & regards,
Pluto

2 REPLIES 2
AScha.3
Chief

Hi,

>Has anyone experienced similar issues 

Well, what is the "issue" then ? (You dont show any right -> wrong values... so just guessing)

How long is the connection cpu - cpu ? speed ? screened ? NSS ?

Because there is a basic problem: if you just let it run , with 8 clks -> 1 byte transmitted, in endless loop : 

what if there any short spike on the clk line ? It will shift one bit random in and you never get a correct byte in receiver again...except you have some way, to re-sync the transmission. Or be sure, there can be no EMI/spike, because screened and only 30mm distance (example), but even then: how to be sure its correct received after power down and starting of one of the cpus ?

So:

- you look for SPI error flags ? and handle them...

- you have NSS (hardware), to get a "frame" info

- you have a control byte or CRC in your transmission protocol ?

- you have thought about a way to "resync" in case of wrong control byte or CRC ? -> (disable/restart SPI unit)

 

If you feel a post has answered your question, please click "Accept as Solution".

You've given us basically nothing to work with.

Code?  (Don't forget the code tags!)  DMA used on either end?  Connection length & SCLK speed?  Data cache(s) enabled?  Do you have a scope or logic analyzer?