Posted on May 17, 2011 at 12:39Hi,
I am using SPI2 and DMA channel 4 to receive data from an external ADC. To address the ADC I am using a buffer containing its channel addresses which are transmitted on DMA channel 5 in parallel when receiving data from channel 4.
In my ISR I am always enabling first DMA channel 4 then channel 5. DMA_IT_TC of channel 4 is enabled. That means if the end of the Rx buffer is reached, the flag will be set and the routine can start again.
If I step through this routine in debug mode, the receive buffer shows the correct values received from the ADC. But if I leave it running without any breakpoints the buffer captures only the values from the first measurements. If the values changes in the ADC they will not be dislayed in the buffer -> The values are frozen in the buffer.
If I put a delay at the end of the ISR, the SPI and the DMA are working fine and a change on all ADC channels will be shown in the buffer immediately. It seems that something is running too fast in the DMA buffer when running the program. The ADC can work up to 9MHz and the maximum SPI clock which I am using is 4.5MHz.
Does anybody have a similar problem? What could be the solution?
[ This message was edited by: patrick.hager on 14-07-2008 12:24 ]
[ This message was edited by: patrick.hager on 14-07-2008 13:05 ]
