(SOLVED) STABIP in STM32F373CC never gets cleared

[TThan]

Hi there,

I am using the STM32F373CC in LQFP48 package on my own application (not a nucleo or discovery board) with all supplies and references connected to 3.3V and decoupled as suggested by ST.

The microcontroller is running as expected, I/Os are operating and I can debug my program using ST-LINK-V2/1 from a NUCLEO-L476RG board. So far everythingis well.

But when I try to confure SDADC1 using STM32CubeMX-V5.0.0 with firmware package STM32F3-V1.10.0 it never returns from HAL_SDADC_Init().

Reason is that STABIP bit in ISR register never gets cleared.

I checked all supply and reference pins of the controller with an oscilloscope, no errors detected here. What can be the reasons for STABIP never getting cleared?

My clocks are configured to use HSI RC to generate a 40 MHz SYSCLK divide that by 8 to get a SDADC clock of 5 MHz. Did I miss to enable some clocks? But that should be handled by STM32Cube firmare packages, I thought.

Any hints or suggestions where to look for a solution would be very appreciated.

Regards

 Thomas

[TThan · Accepted solution]

Finally we found a solution to solve this issue.

As most of the time, the error was not to read the manual thoroughly :flushed_face:

At hardware design stage we have not been sure whether we will use internal or external reference voltage for SDADC1. So we connected VREFSD+ to 3.3V supply, decoupled with 1µF and 10nF capacitors.

But during Firmware development we finally decided to use internal VREF with 1.2V and initialized the SDADC accordingly.

But you may not connect the VREFSD+ pin to supply, when you use internal reference, otherwise STABIP never ever gets cleared.

Disconnecting VREFSD+ from 3.3V fixed it.

Cheers

Thomas

[waclawek.jan]

Thanks for coming back with the solution

Please mark your post as "Best" so that the thread shows up as solved.

JW