2023-10-29 01:54 PM
Good evening,
I am trying to sample various signals at different frequencies with adc in dma. Changing the size of the acquisition buffer seems inefficient, so I opted to change the clock prescalers, but it's giving me problems (I guess on changing the baud rate). Do you have any advice on how to change the input signal sampling rate without possibly affecting the UART?
Solved! Go to Solution.
2023-10-29 02:00 PM
Some of the newer parts allow for secondary sources of peripheral clocks.
On a generic F4 part you'll need to briefly disable the UART (UE) and shift the BRR to maintain the ratios, then re-enable. Use USART on a different APB than you're changing frequency on.
Of the ADC + DMA, drive with a TIM trigger, and change the TIM to pace the acquisition.
2023-10-29 02:00 PM
Some of the newer parts allow for secondary sources of peripheral clocks.
On a generic F4 part you'll need to briefly disable the UART (UE) and shift the BRR to maintain the ratios, then re-enable. Use USART on a different APB than you're changing frequency on.
Of the ADC + DMA, drive with a TIM trigger, and change the TIM to pace the acquisition.
2023-11-09 09:20 AM
I solved this in a different way to the one you proposed, i.e. by changing the prescaler by modifying the clock configuration function for adc acquisition in dma and then putting it back to the initial settings for serial communication.