Question on 4.7uF ceramic capacitor

[AA4]

Post edited by ST moderator: title and post edited to translate the content.

我在stm32F412RGT6的数据手册的6.1.6部分看到关于滤波电容的描述，2. The 4.7 µF ceramic capacitor must be connected to one of the VDD pin.从图中来看是以144PIN的芯片为例，但我使用的是64PIN的封装，是否也需要在其中一个VDD引脚放置4.7uf的电容，如果需要，是单独放置一个4.7uf还是与一个0.1uf并联放置

Translation:

"In section 6.1.6 of the STM32F412RGT6 datasheet, regarding filter capacitors, it states: "2. The 4.7 µF ceramic capacitor must be connected to one of the VDD pins." The diagram shows this for a 144-pin chip, but I'm using a 64-pin package. Do I also need to place a 4.7 µF capacitor on one of the VDD pins? If so, should I place a single 4.7 µF capacitor or connect it in parallel with a 0.1 µF capacitor?"

[AScha.3]

अहं चीनीभाषां पठितुं न शक्नोमि...

...so write in english , please.

[AA4]

I found the description about the filter capacitor in Section 6.1.6 of the data sheet for STM32F412RGT6. 2. The 4.7 µF ceramic capacitor must be connected to one of the VDD pins. From the figure, it is assumed that the 144PIN chip is used as an example. However, I am using a 64PIN package. Does it also need to place a 4.7uf capacitor at one of the VDD pins? If so, should it be placed separately as a 4.7uf capacitor or in parallel with a 0.1uf capacitor?

[mƎALLEm]

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@AA4 wrote:

However, I am using a 64PIN package. Does it also need to place a 4.7uf capacitor at one of the VDD pins? If so, should it be placed separately as a 4.7uf capacitor or in parallel with a 0.1uf capacitor?

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In parallel to the VDD power supply ring near to the MCU + in parallel to each 100nF connected to each VDD pin. No matter the package used.

[AScha.3]

The 4.7u is just a bulk cap , so you should have it somewhere it on the VDD , for any cpu, independent how many pins the case has.

btw

I use always just 10u 0805 ceramic caps, so i have one at in and one at output at the 3v3 supply regulator.

Anyway on same board, so not far from the cpu.

[AA4]

Based on the datasheet, I have added one 4.7µF capacitor and one 0.1µF capacitor to only one of all VDD pins, while for the other VDD pins I have only used 0.1µF capacitors. Is this configuration acceptable? Additionally, is this 4.7µF capacitor necessary? What problems would occur if this capacitor is not present?

[mƎALLEm]

@AA4 

Only one 4.7uF capacitor (bulk capacitor) is needed and it is recommended. The 4.7 μF capacitor on the MCU VDD is essential for decoupling, noise filtering (low frequencies), and power stability. It should not be omitted or replaced with a much smaller value, as this can lead to unreliable or incorrect MCU operation.

Other decoupling capacitors are 100nF per VDD pin that filter the high frequencies and they handle the extremely fast current spikes caused by the MCU's internal logic high switching frequencies.

All the components given in the datasheet are necessary.

Hope that naswers your question.

[AA4]

As shown in the figure, do I need to place another 0.1uf capacitor on the VDD pin where a 4.7uf capacitor is already present, or is a single 4.7uf capacitor sufficient?

[mƎALLEm]

 This is what the AN4488 "Getting started with STM32F4xxxx MCU hardware development" is saying:

No need for that 0.1uF in parallel to 4.7uF.

[AA4]

Thank you very much for your response. In the 2.2 section of the AN4488 document you provided, I saw the attached figure. In the circled area of the figure, I think the N value is incorrect. I believe it should be (N-1) because 4.7UF occupies one pin. I verified my statement using the figure I took from the data sheet of STM32F412RGT6 (the second figure in the attachment).